TAS5036APFCRG4 datasheet(33/62 Pages) TI

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Serial Control Interface Register Definitions

SLES061B—November 2002—Revised January 2004

TAS5036A

3.4

System Control Register 1 (0x03)

Table 3−5. System Control Register 1

FUNCTION

Reserved

Valid remains high during automute.

Valid goes low during automute.

Valid remains high during mute.

Valid goes low during mute.

Mute

Normal mode

Set error recovery delay at 6

µs

Set error recovery delay at 47

µs

Error recovery (forces error recovery initialization sequence)

Normal mode

Automute disabled

Automute enabled

Reserved

3.5

Error Recovery Register (0x04)

Table 3−6. Error Recovery Register

FUNCTION

−

Set to 11 under default conditions and when x00 is written into x1F

−

If 0x84 is written into register 0x1F –

Enable volume ramp up after an error recovery sequence is initiated by the

ERR_RCVRY terminal or the I2C error recovery command (register X03 bit D2)

−

If 0x84 is written into register 0x1F –

Disable volume ramp up after an error recovery sequence is initiated by the

ERR_RCVRY terminal or the I2C error recovery command (register X03 bit D2)

−

If 0x84 is written into register 0x1F –

Enable volume ramp up after error recovery sequence is initiated by register bits

D5 – D0 of this register

−

If 0x84 is written into register 0x1F –

Enable volume ramp up after error recovery sequence is initiated by register bits

D5 – D0 of this register

−

Put channel 6 into error recovery mode

−

Put channel 5 into error recovery mode

−

Put channel 4 into error recovery mode

−

Put channel 3 into error recovery mode

−

Put channel 2 into error recovery mode

−

Put channel 1 into error recovery mode

−

Normal operation

TAS5036APFCRG4 数据表(PDF) 33 Page - Texas Instruments

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TAS5036APFCRG4 数据表(PDF) 33 Page - Texas Instruments

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