STA323W datasheet(12/71 Pages) STMICROELECTRONICS

12 / 71 page

Schematics

STA323W

12/71

I/O

GND2A

Negative supply

I/O

VCC2A

Positive supply

OUT2A

Output half bridge 2A

OUT1B

Output half bridge 1B

I/O

VCC1B

Positive supply

I/O

GND1B

Negative supply

I/O.

GND1A

Negative supply

N.C.

Not connected

I/O

VCC1A

Positive supply

OUT1A

Output half bridge 1A

I/O

GNDCLEAN

Reference ground

I/O

GNDREG

Substrate ground

I/O

VDD DIGITAL

Logic supply

I/O

Logic supply to power section

CONFIG

Logic levels

RESET

Reset

SCL

I²C serial clock

I/O

SDA

I²C serial data

RES

Reserved

Test pin to be externally connected to ground

PLL FILTER

Connection to PLL filter

XTI

PLL input clock

I/O

Analog ground

I/O

Analog supply

Analog supply 3.3

SDI_12

I²S serial data channels 1 and 2

I/O

LRCKI

I²S left/right clock,

BICKI

I²S serial clock

I/O

Digital ground

I/O

Digital supply

Digital supply 3.3 V

I/O

VSS digital

5 V regulator referred to +Vcc

I/O

VCC digital

5 V regulator referred to ground (signal positive

supply)

Table 4.

Pin description (continued)

Type

Name

Description

STA323W 数据表(PDF) 12 Page - STMicroelectronics

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STA323W 数据表(PDF) 12 Page - STMicroelectronics

STA323W 数据表(HTML) 12 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71

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链接网址

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