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STA323W 数据表(PDF) 34 Page - STMicroelectronics

部件名 STA323W
功能描述  2.1 high efficiency digital audio system
PDF  71 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA323W 数据表(HTML) 34 Page - STMicroelectronics

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Register descriptions
STA323W
34/71
7.1
Configuration register A (address 0x00)
7.1.1
Master clock select
The STA323W supports sample rates of 32 kHz, 44.1 kHz, 48 khz, 88.2 kHz, and 96 kHz.
Therefore the internal clock is:
●
32.768 MHz for 32 kHz
●
45.1584 MHz for 44.1 khz, 88.2 kHz, and 176.4 kHz
●
49.152 MHz for 48 kHz, 96 kHz, and 192 kHz
0x20
A2cf1
C4B23
C4B22
C4B21
C4B20
C4B19
C4B18
C4B17
C4B16
0x21
A2cf2
C4B15
C4B14
C4B13
C4B12
C4B11
C4B10
C4B9
C4B8
0x22
A2cf3
C4B7C4B6C4B5C4B4C4B3C4B2C4B1C4B0
0x23
B0cf1
C5B23
C5B22
C5B21
C5B20
C5B19
C5B18
C5B17
C5B16
0x24
B0cf2
C5B15
C5B14
C5B13
C5B12
C5B11
C5B10
C5B9
C5B8
0x25
B0cf3
C5B7C5B6C5B5C5B4C5B3C5B2C5B1C5B0
0x26
Cfud
WA
W1
0x27
MPCC1
MPCC15
MPCC14
MPCC13
MPCC12
MPCC11
MPCC10
MPCC9
MPCC8
0x28
MPCC2
MPCC7
MPCC6
MPCC5
MPCC4
MPCC3
MPCC2
MPCC1
MPCC0
0x29
RES
RES
RES
RES
RES
RES
RES
RES
RES
0x2A
RES
RES
RES
RES
RES
RES
RES
RES
RES
0x2B
FDRC1
FDRC15
FDRC14
FDRC13
FDRC12
FDRC11
FDRC10
FDRC9
FDRC8
0x2C
FDRC2
FDRC7
FDRC6
FDRC5
FDRC4
FDRC3
FDRC2
FDRC1
FDRC0
0x2D
Status
PLLUL
FAULT
TWARN
Table 12.
Register summary (continued)
Address
Name
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
FDRB
TWAB
TWRB
IR1
IR0
MCS2
MCS1
MCS0
01100
011
Table 13.
Master clock select
Bit
R/W
RST
Name
Description
0R/W
1
MCS0
Master clock select: selects the ratio between the input
I2S sample frequency and the input clock.
1R/W
1
MCS1
2R/W
0
MCS2



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