AT89C51AC3-RDTIM datasheet(76/143 Pages) ATMEL

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AT89C51AC3

4383B–8051–01/05

Registers

Table 36. T2CON Register

T2CON (S:C8h)

Timer 2 Control Register

Reset Value = 0000 0000b

Bit addressable

543

210

TF2

EXF2

RCLK

TCLK

EXEN2

TR2

C/T2#

CP/RL2#

Bit

Number

Bit

Mnemonic Description

7TF2

Timer 2 Overflow Flag

TF2 is not set if RCLK=1 or TCLK = 1.

Must be cleared by software.

Set by hardware on timer 2 overflow.

EXF2

Timer 2 External Flag

Set when a capture or a reload is caused by a negative transition on T2EX pin if

EXEN2=1.

Set to cause the CPU to vector to timer 2 interrupt routine when timer 2 interrupt

is enabled.

Must be cleared by software.

RCLK

Receive Clock bit

Clear to use timer 1 overflow as receive clock for serial port in mode 1 or 3.

Set to use timer 2 overflow as receive clock for serial port in mode 1 or 3.

4TCLK

Transmit Clock bit

Clear to use timer 1 overflow as transmit clock for serial port in mode 1 or 3.

Set to use timer 2 overflow as transmit clock for serial port in mode 1 or 3.

EXEN2

Timer 2 External Enable bit

Clear to ignore events on T2EX pin for timer 2 operation.

Set to cause a capture or reload when a negative transition on T2EX pin is

detected, if timer 2 is not used to clock the serial port.

2TR2

Timer 2 Run Control bit

Clear to turn off timer 2.

Set to turn on timer 2.

1C/T2#

Timer/Counter 2 Select bit

Clear for timer operation (input from internal clock system: FOSC).

Set for counter operation (input from T2 input pin).

0CP/RL2#

Timer 2 Capture/Reload bit

If RCLK=1 or TCLK=1, CP/RL2# is ignored and timer is forced to auto-reload on

timer 2 overflow.

Clear to auto-reload on timer 2 overflows or negative transitions on T2EX pin if

EXEN2=1.

Set to capture on negative transitions on T2EX pin if EXEN2=1.

AT89C51AC3-RDTIM 数据表(PDF) 76 Page - ATMEL Corporation

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