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AT89C51AC3-RDTIM 数据表(PDF) 78 Page - ATMEL Corporation |
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AT89C51AC3-RDTIM 数据表(HTML) 78 Page - ATMEL Corporation |
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78 / 143 page ![]() 78 AT89C51AC3 4383B–8051–01/05 Table 39. TL2 Register TL2 (S:CCh) Timer 2 Low Byte Register Reset Value = 0000 0000b Not bit addressable Table 40. RCAP2H Register RCAP2H (S:CBh) Timer 2 Reload/Capture High Byte Register Reset Value = 0000 0000b Not bit addressable Table 41. RCAP2L Register RCAP2L (S:CAH) TIMER 2 REload/Capture Low Byte Register Reset Value = 0000 0000b Not bit addressable 76 543 210 -- ---- -- Bit Number Bit Mnemonic Description 7-0 Low Byte of Timer 2. 76 543 210 -- ---- -- Bit Number Bit Mnemonic Description 7-0 High Byte of Timer 2 Reload/Capture. 76 543 210 -- ---- -- Bit Number Bit Mnemonic Description 7-0 Low Byte of Timer 2 Reload/Capture. |
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