AT89C51AC3-RDTIM datasheet(95/143 Pages) ATMEL

95 / 143 page

AT89C51AC3

4383B–8051–01/05

Figure 53. PCA Timer/Counter

The CMOD register includes three additional bits associated with the PCA.

•

The CIDL bit which allows the PCA to stop during idle mode.

•

The WDTE bit which enables or disables the WatchDog function on module 4.

•

The ECF bit which when set causes an interrupt and the PCA overflow flag CF in

CCON register to be set when the PCA timer overflows.

The CCON register contains the run control bit for the PCA and the flags for the PCA

timer and each module.

•

The CR bit must be set to run the PCA. The PCA is shut off by clearing this bit.

•

The CF bit is set when the PCA counter overflows and an interrupt will be generated

if the ECF bit in CMOD register is set. The CF bit can only be cleared by software.

•

The CCF0:4 bits are the flags for the modules (CCF0 for module0...) and are set by

hardware when either a match or a capture occurs. These flags also can be cleared

by software.

PCA Modules

Each one of the five compare/capture modules has six possible functions. It can

perform:

•

16-bit Capture, positive-edge triggered

•

16-bit Capture, negative-edge triggered

•

16-bit Capture, both positive and negative-edge triggered

•

16-bit Software Timer

•

16-bit High Speed Output

•

8-bit Pulse Width Modulator.

In addition module 4 can be used as a WatchDog Timer.

CIDL

CPS1 CPS0

ECF

16 bit up counter

To PCA

modules

FPca/6

FPca/2

T0 OVF

P1.2

Idle

CMOD

0xD9

WDTE

CCON

0xD8

CCF4 CCF3 CCF2 CCF1 CCF0

overflow

AT89C51AC3-RDTIM 数据表(PDF) 95 Page - ATMEL Corporation

AT89C51AC3-RDTIM 数据表(HTML) 95 Page - ATMEL Corporation

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