BS640HD9V datasheet(74/89 Pages) AMD

部件名	BS640HD9V

功能描述	128 or 64 Megabit (8 M or 4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory

PDF	89 Pages

Scroll/Zoom	100%

制造商	AMD [Advanced Micro Devices]

网页	http://www.amd.com

标志

74 / 89 page

Am29BDS128H/Am29BDS640H

27024B3 May 10, 2006

D A TA

SH EE T

AC CHARACTERISTICS

Notes:

1. PA = Program Address, PD = Program Data, VA = Valid Address for reading status bits.

2. “In progress” and “complete” refer to status of program operation.

3. Amax–A12 are don’t care during command sequence unlock cycles.

4. Addresses are latched on the first of either the rising edge of AVD# or the active edge of CLK.

5. Either CE# or AVD# is required to go from low to high in between programming command sequences.

6. The Synchronous programming operation is dependent of the Set Device Read Mode bit in the Configuration Register. The

Configuration Register must be set to the Synchronous Read Mode.

Figure 36.

Synchronous Program Operation Timings: WE# Latched Addresses

OE#

CE#f

Data

Addresses

AVD#

WE#

CLK

VCCf

555h

tWC

tWPH

tWP

tVCS

tDH

tCH

Progress

tWHWH1

Complete

Program Command Sequence (last two cycles)

Read Status Data

tDS

tAVDP

A0h

tACS

tCAS

tACH

tAVCH

tCSW

BS640HD9V 数据表(PDF) 74 Page - Advanced Micro Devices

BS640HD9V 数据表(HTML) 74 Page - Advanced Micro Devices

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