PCF2103EUSLASH2SLASHF2 datasheet(2/56 Pages) PHILIPS

2 / 56 page

1998 May 11

Philips Semiconductors

Product speciﬁcation

LCD controllers/drivers

PCF2103 family

CONTENTS

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

ORDERING INFORMATION

BLOCK DIAGRAM

PINNING

FUNCTIONAL DESCRIPTION

7.1

LCD bias voltage generator

7.2

Oscillator

7.3

External clock

7.4

Power-on reset

7.5

Power-down mode

7.6

Registers

7.7

Busy flag

7.8

Address Counter (AC)

7.9

Display Data RAM (DDRAM)

7.10

Character Generator ROM (CGROM)

7.11

Character Generator RAM (CGRAM)

7.12

Cursor control circuit

7.13

Timing generator

7.14

LCD row and column drivers

7.15

Reset function

INSTRUCTIONS

8.1

Clear display

8.2

Return home

8.3

Entry mode set

8.3.1

I/D

8.3.2

8.4

Display control (and partial power-down mode)

8.4.1

8.4.2

8.4.3

8.5

Cursor or display shift

8.6

Function set

8.6.1

DL (parallel mode only)

8.6.2

8.6.3

8.7

Set CGRAM address

8.8

Set DDRAM address

8.9

Read busy flag and address counter

8.10

Write data to CGRAM or DDRAM

8.11

Read data from CGRAM or DDRAM

8.12

Extended function set instructions and features

8.12.1

New instructions

8.12.2

Icon control

8.12.3

8.12.4

8.12.5

Screen configuration

8.12.6

Display configuration

8.12.7

Reducing current consumption

INTERFACE TO MICROCONTROLLER

9.1

Parallel interface

9.2

I2C-bus interface

9.2.1

Characteristics of the I2C-bus

9.2.2

I2C-bus protocol

9.2.3

Definitions

LIMITING VALUES

HANDLING

DC CHARACTERISTICS

AC CHARACTERISTICS

TIMING CHARACTERISTICS

APPLICATION INFORMATION

15.1

8-bit operation, 1-line display using internal

reset

15.2

4-bit operation, 1-line display using internal

reset

15.3

8-bit operation, 2-line display

15.4

I2C-bus operation, 1-line display

BONDING PAD LOCATIONS

DEFINITIONS

LIFE SUPPORT APPLICATIONS

PURCHASE OF PHILIPS I2C COMPONENTS

PCF2103EU/2/F2 数据表(PDF) 2 Page - NXP Semiconductors

PCF2103EU/2/F2 数据表(HTML) 2 Page - NXP Semiconductors

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