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PCF5083H/F2 数据表(PDF) 63 Page - NXP Semiconductors |
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PCF5083H/F2 数据表(HTML) 63 Page - NXP Semiconductors |
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63 / 136 page ![]() 1996 Oct 29 63 Philips Semiconductors Objective specification GSM signal processing IC PCF5083 9.3 GSM baseband procedures The baseband procedures with optional input parameters can be called by the EXEC_PROC command as described in Section 9.2. Return values are packed in the PROC_RETURN indication. Every procedure deals with the following types of data: • Input parameters which are directly supplied by the System Controller • Return values which are automatically sent to the System Controller as soon as the procedure is completed • Input and output data buffers located in the DSP data RAM. They are used for communication with other procedures. Most of the procedures use a common buffer SCRATCH_BUFF for their input and output data. Only a small number of procedures need specific buffer for input or output. In this case there are one or two additional parameters in_buff_id or out_buff_id which determine the buffers where input and output data are located. In Table 55 a list of all available buffers is given. For all trailing parameters of a procedure which are not transmitted with the EXEC_PROC command a default value of zero is used. Table 55 Data buffers for baseband procedures Notes 1. X = don’t care. MNEMONIC ID(1) SIZE DESCRIPTION VERSION_BUFF 0X8000 10 Contains the BCD coded version numbers of all software packages (order: MP, BB, CI, CM, DB, EM, FB, SP and TP). A version number 0Xmm.ss means version mm.ss. SCRATCH_BUFF 0X8001 167 Scratch buffer for communication between arbitrary modules. TCH_CMI_BUFF 0X8002 116 The combination of the 4 buffers; TCH_CMI_BUFF1 to TCH_CMI_BUFF4. TCH_CMI_BUFF1 0X8003 29 Used to store the CMI values of 4 consecutive bursts belonging to one TCH block. TCH_CMI_BUFF2 0X8004 29 TCH_CMI_BUFF3 0X8005 29 TCH_CMI_BUFF4 0X8006 29 CCH_CMI_BUFF 0X8007 116 The combination of the 4 buffers; CCH_CMI_BUFF1 to CCH_CMI_BUFF4. CCH_CMI_BUFF1 0X8008 29 Used to store the CMI values of 4 consecutive bursts belonging to one CCH block. CCH_CMI_BUFF2 0X8009 29 CCH_CMI_BUFF3 0X800A 29 CCH_CMI_BUFF4 0X800B 29 CCH_INFO_BUFF 0X800C 32 The combination of the 4 buffers; CCH_INFO_BUFF1 to CCH_INFO_BUFF4. CCH_INFO_BUFF1 0X800D 8 Used to store the information bits 4 bursts belonging to one CCH block. CCH_INFO_BUFF2 0X800E 8 CCH_INFO_BUFF3 0X800F 8 CCH_INFO_BUFF4 0X8010 8 TCH_LOOP_BUFF 0X8011 82 Used to store four normal bursts during TCH loop-back operation. Note this buffer is also used by the speech encoder. MP_CONTROL_BUFF 0X8013 6 Used to control several features of the firmware; see Table 56. IQ_BUFF 0X8018 334 Used to store I and Q components from the PCF5072. This buffer is overlaid with SCRATCH_BUFF. |
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