PCF5083HSLASHF2 datasheet(8/136 Pages) PHILIPS

8 / 136 page

1996 Oct 29

Philips Semiconductors

Objective speciﬁcation

GSM signal processing IC

PCF5083

AUXON

Auxiliary Switch on input (active HIGH, CMOS level Schmitt trigger input).

LOWVOLT

Low battery indication (active LOW, CMOS level Schmitt trigger input).

POWON

Power Regulator on (active HIGH).

NPOWON

Power Regulator on (active LOW).

RST

Asynchronous Reset for timer section (active LOW, CMOS level Schmitt trigger

input).

CLK32K

The 32.768 kHz CMOS level output for PCF5083-2B and PCF5083-2C.

CLK26M

The 26 MHz CMOS level output for PCF5083-3.

TXD

RS232 transmit data output (open-drain output).

RXD

RS232 receive data input.

MMIEN

RS232 input buffer full indication (active LOW, open-drain output).

MMIREQ

MMI clock request (active HIGH, CMOS level Schmitt trigger input).

MMICLK

MMI clock 13 MHz.

FSC

I/O

IOM®-2 frame pulse (3-state).

DCL

I/O

IOM®-2 clock (3-state).

IOM®-2 data input (CMOS level Schmitt trigger input).

IOM®-2 data output (open drain output).

VSS2

Ground core.

VDD1

Supply I/O pin.

VSS1

Ground I/O pin.

VDD2

Supply core.

RFCLK

−IC interface shift clock (3-state).

RFEN1

−IC Interface Enable 1(active LOW, 3-state).

RFEN2

−IC Interface Enable 2 (active LOW, 3-state).

RFEN3

−IC Interface Enable 3 (active LOW, 3-state).

RFEN4

−IC Interface Enable 4 (active LOW, 3-state).

VDD2

Supply core.

VSSPLL

Ground for PLL.

RFDI

−IC Interface data in.

RFDO

−IC Interface data out (3-state).

RFE

−IC Interface Enable (active HIGH, 3-state).

NREFON

Reference oscillator power-down (active LOW, 3-state).

SYMBOL

I/O

DESCRIPTION

PCF5083H/F2 数据表(PDF) 8 Page - NXP Semiconductors

PCF5083H/F2 数据表(HTML) 8 Page - NXP Semiconductors

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