数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

XCB56364PV100 数据表(PDF) 3 Page - Freescale Semiconductor, Inc

部件名 XCB56364PV100
功能描述  24-Bit Audio Digital Signal Processor
PDF  148 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

XCB56364PV100 数据表(HTML) 3 Page - Freescale Semiconductor, Inc

  XCB56364PV100 Datasheet HTML 1Page - Freescale Semiconductor, Inc XCB56364PV100 Datasheet HTML 2Page - Freescale Semiconductor, Inc XCB56364PV100 Datasheet HTML 3Page - Freescale Semiconductor, Inc XCB56364PV100 Datasheet HTML 4Page - Freescale Semiconductor, Inc XCB56364PV100 Datasheet HTML 5Page - Freescale Semiconductor, Inc XCB56364PV100 Datasheet HTML 6Page - Freescale Semiconductor, Inc XCB56364PV100 Datasheet HTML 7Page - Freescale Semiconductor, Inc XCB56364PV100 Datasheet HTML 8Page - Freescale Semiconductor, Inc XCB56364PV100 Datasheet HTML 9Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 148 page
background image
Overview
DSP56364 Technical Data, Rev. 4.1
Freescale Semiconductor
1-3
1.1
Features
1.1.1
Digital Signal Processing Core
100 Million Instructions Per Second (MIPS) with an 100 MHz clock at 3.3V.
Object Code Compatible with the 56000 core.
Data ALU with a 24
× 24 bit multiplier-accumulator and a 56-bit barrel shifter. 16-bit arithmetic
support.
Program Control with position independent code support and instruction cache support.
Six-channel DMA controller.
PLL based clocking with a wide range of frequency multiplications (1 to 4096), predivider factors
(1 to 16) and power saving clock divider (2i: i = 0 to 7). Reduces clock noise.
Internal address tracing support and OnCE
™ for Hardware/Software debugging.
JTAG port.
Very low-power CMOS design, fully static design with operating frequencies down to DC.
STOP and WAIT low-power standby modes.
1.1.2
On-Chip Memory Configuration
1.5K
× 24 Bit Y-Data RAM.
•1K
× 24 Bit X-Data RAM.
•8K
× 24 Bit Program ROM.
0.5K
× 24 Bit Program RAM and 192 × 24 Bit Bootstrap ROM.
0.75K
× 24 Bit from Y Data RAM can be switched to Program RAM resulting in up to 1.25K × 24
Bit of Program RAM.
1.1.3
Off-Chip Memory Expansion
External Memory Expansion Port with 8-bit data bus.
Off-chip expansion up to 2
× 16M × 8-bit word of Data/Program memory when using DRAM.
Off-chip expansion up to 2
× 256k × 8-bit word of Data/Program memory when using SRAM.
Simultaneous glueless interface to SRAM and DRAM.
1.1.4
Peripheral Modules
Enhanced Serial Audio Interface (ESAI): 6 serial lines, 4 selectable as receive or transmit and 2
transmit only, master or slave. I2S, Sony, AC97, network and other programmable protocols.
Unused pins of ESAI may be used as GPIO lines.
Serial Host Interface (SHI): SPI and I2C protocols, 10-word receive FIFO, support for 8, 16 and
24-bit words.
Four dedicated GPIO lines.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com