XCB56364PV100 datasheet(5/148 Pages) FREESCALE

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DSP56364 Technical Data, Rev. 4.1

Freescale Semiconductor

2-1

Signal/Connection Descriptions

2.1

Signal Groupings

The input and output signals of the DSP56364 are organized into functional groups, which are listed in

Table 2-1 and illustrated in Figure 2-1.

The DSP56364 is operated from a 3.3 V supply; however, some of the inputs can tolerate 5 V. A special

notice for this feature is added to the signal descriptions of those inputs.

Table 2-1 DSP56364 Functional Signal Groupings

Functional Group

Number of

Signals

Detailed

Description

Power (VCC)18

Table 2-2

Ground (GND)

Table 2-3

Clock and PLL

Table 2-4

Address bus

Port A1

1 Port A is the external memory interface port, including the external address bus, data bus, and control signals.

Table 2-5

Data bus

Table 2-6

Bus control

Table 2-7

Interrupt and mode control

Table 2-8

General Purpose I/O

Port B2

2 Port B signals are the GPIO signals.

Table 2-12

SHI

Table 2-9

ESAI

Port C3

3 Port C signals are the ESAI port signals multiplexed with the GPIO signals.

Table 2-10

JTAG/OnCE Port

Table 2-11

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