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VSYNC Alignment

Sync Bypass

Lines Per Frame Status

TVP7002

SLES206 – MAY 2007

Subaddress

35h

Default (10h)

7

6

5

4

3

2

1

0

VS-HS Align [7:0]

VS-HS Align [7:0]: Specifies the number of pixels that the leading edge of the VSYNC output should be delayed or advanced relative to the

leading edge of the HSYNC output. The Field ID output is delayed by the same amount. Twos-complement number. This register has no

effect when either Sync bypass mode is enabled (see subaddresses 22h and 36h).

00h–7Fh = VSYNC leading edge delayed relative to the HSYNC leading edge

FFh–80h = VSYNC leading edge advanced relative to the HSYNC leading edge

Subaddress

36h

Default (00h)

7

6

5

4

3

2

1

0

Reserved

VS INV

HS INV

VS BP

HS BP

VS INV: VSYNC output polarity control. This bit only has an effect if the VSYNC bypass is asserted (bit 1 = 1).

0 = HSYNC output polarity matches input polarity (default)

1 = HSYNC output polarity inverted

HS INV: HSYNC output polarity control. This bit only has an effect if the HSYNC bypass is asserted (bit 0 = 1).

0 = HSYNC output polarity matches input polarity (default)

1 = HSYNC output polarity inverted

VS BP: VSYNC bypass. This bit enables bypassing the Sync processing block in order to output a raw unprocessed VSYNC.

0 = Normal operation (default)

1 = VSYNC bypass mode

HS BP: HSYNC bypass. This bit enables bypassing the Sync processing block in order to output a raw unprocessed HSYNC.

0 = Normal operation (default)

1 = HSYNC bypass mode

Note: See register 14h for input sync polarity detect.

Subaddress

37h–38h

Read only

Subaddress

7

6

5

4

3

2

1

0

37h

Lines per Frame [7:0]

38h

Reserved

mac detect

P/I detect

Reserved

Lines per Frame [11:8]

mac detect: Macrovision pseudo-sync detection status

0 = Macrovision not detected

1 = Macrovision detected

P/I detect: Progressive/interlaced video detection status. Not dependent on the H-PLL being locked.

0 = Interlaced video detected

1 = Progressive video detected

Lines per Frame [11:0]: Number of lines per frame.

of the video input.

Note: The Lines per Frame counter is not dependent on the H-PLL being locked.

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