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TVP7002PZP 数据表(PDF) 6 Page - Texas Instruments |
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TVP7002PZP 数据表(HTML) 6 Page - Texas Instruments |
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6 / 52 page ![]() www.ti.com TVP7002 SLES206 – MAY 2007 TERMINAL FUNCTIONS (continued) TERMINAL I/O DESCRIPTION NAME NO. POWER SUPPLIES NSUB 21, 91 I Substrate ground. Connect to analog ground. A33VDD 13, 14, 93, 94 I Analog power. Connect to 3.3 V. A33GND 12, 15, 92, 95 I Analog 3.3-V return. Connect to ground. AGND 3, 5, 8, 20 I Analog 1.9-V return. Connect to ground. AVDD 4, 6, 7, 19 I Analog power. Connect to 1.9 V. PLL_AVDD 84, 85 I PLL analog power. Connect to 1.9 V. PLL_AGND 83, 86, 90 I PLL analog power return. Connect to ground. DGND 40, 68 I Digital return. Connect to ground. DVDD 39, 69 I Digital power. Connect to 1.9 V. IOGND 27, 42, 54, 60, I Digital power return. Connect to ground. 67 IOVDD 26, 41, 53, 66 I Digital power. Connect to 3.3 V or less for reduced noise. SYNC SIGNALS CLAMP 76 I External Clamp input. Unused inputs can be connected to ground. COAST 77 I External PLL COAST signal input. Unused inputs can be connected to ground. VSYNC_A 78 I Vertical sync input A VSYNC_B 79 I Vertical sync input B Unused inputs can be connected to ground. HSYNC_A 81 I Horizontal sync input A HSYNC_B 82 I Horizontal sync input B Unused inputs can be connected to ground. SOGIN1 1 I Sync-on-green input 1 SOGIN2 99 I Sync-on-green input 2 SOGIN3 97 I Sync-on-green input 3 Unused inputs should be connected to ground using a 1-nF capacitor. FIDOUT 22 O Field ID output. Using bits 2 and 3 of register 16h, this pin may also be programmed to be the internal sync processing clock output, coast output, clamp pulse output, or data enable. VSOUT 23 O Vertical sync output HSOUT 24 O Horizontal sync output SOGOUT 25 O Sync-on-green slicer output 6 Submit Documentation Feedback |
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