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TVP7002PZP 数据表(PDF) 10 Page - Texas Instruments

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部件名 TVP7002PZP
功能描述  TRIPLE 8-/10-BIT 165-/110-MSPS, VIDEO AND GRAPHICS DIGITIZER WITH HORIZONTAL PLL
PDF  52 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TVP7002PZP 数据表(HTML) 10 Page - Texas Instruments

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TIMING REQUIREMENTS
DATACLK
t1
t2
t3
Valid Data
ROUT, GOUT,
BOUT, HSOUT
Valid Data
V
OH
V
OL
TVP7002
SLES206 – MAY 2007
PARAMETER
TEST CONDITIONS(1)
MIN
TYP
MAX
UNIT
CLOCKS, VIDEO DATA, SYNC TIMING
Duty cycle DATACLK (CLK POL=0)
51
%
Duty cycle DATACLK (CLK POL=1)
44
%
t1
DATACLK rise time
10% to 90%
1
ns
t2
DATACLK fall time
90% to 10%
1
ns
t3
Output delay time
0
2.5
ns
(1)
Measured at 162 MHz with 22-
Ω series termination resistor and 10-pF load. Specified by characterization only.
Figure 1. Clock, Video Data, and Sync Timing
10
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