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PIC18F258-E/SOSQTP 数据表(PDF) 24 Page - Microchip Technology |
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PIC18F258-E/SOSQTP 数据表(HTML) 24 Page - Microchip Technology |
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24 / 402 page ![]() PIC18FXX8 DS41159E-page 22 © 2006 Microchip Technology Inc. If the main oscillator is configured for HS4 (PLL) mode, an oscillator start-up time (TOST) plus an additional PLL time-out (TPLL) will occur. The PLL time-out is typically 2 ms and allows the PLL to lock to the main oscillator frequency. A timing diagram indicating the transition from the Timer1 oscillator to the main oscillator for HS4 mode is shown in Figure 2-9. If the main oscillator is configured in the RC, RCIO, EC or ECIO modes, there is no oscillator start-up time-out. Operation will resume after eight cycles of the main oscillator have been counted. A timing diagram indicat- ing the transition from the Timer1 oscillator to the main oscillator for RC, RCIO, EC and ECIO modes is shown in Figure 2-10. FIGURE 2-9: TIMING FOR TRANSITION BETWEEN TIMER1 AND OSC1 (HS WITH PLL) FIGURE 2-10: TIMING FOR TRANSITION BETWEEN TIMER1 AND OSC1 (RC, EC) Q4 Q1 Q1 Q2 Q3 Q4 Q1 Q2 OSC1 Internal System SCS (OSCCON<0>) Program PC PC + 2 Note 1: TOST = 1024 TOSC (drawing not to scale). T1OSI Clock TOST Q3 PC + 4 TPLL TOSC TT1P TSCS Q4 OSC2 PLL Clock Input 1 2 34 56 7 8 Counter Q3 Q4 Q1 Q1 Q2 Q3 Q4 Q1 Q2 Q3 OSC1 Internal System SCS (OSCCON<0>) Program PC PC + 2 Note 1: RC Oscillator mode assumed. PC + 4 T1OSI Clock OSC2 Q4 TT1P TOSC TSCS 12 3 4 5 6 7 8 Counter |
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