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PIC18F258-E/SOSQTP 数据表(PDF) 80 Page - Microchip Technology |
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PIC18F258-E/SOSQTP 数据表(HTML) 80 Page - Microchip Technology |
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80 / 402 page  PIC18FXX8 DS41159E-page 78 © 2006 Microchip Technology Inc. FIGURE 8-1: INTERRUPT LOGIC TMR0IE GIE/GIEH GIEL/PEIE Wake-up if in Sleep mode Interrupt to CPU Vector to Location 0008h INT1IF INT1IE INT1IP TMR0IF TMR0IE TMR0IP INT0IF INT0IE RBIF RBIE RBIP TMR0IF TMR0IP INT1IF INT1IE INT1IP RBIF RBIE RBIP INT0IF INT0IE PEIE/GIEL Interrupt to CPU Vector to Location IPEN 0018h Peripheral Interrupt Flag bit Peripheral Interrupt Enable bit Peripheral Interrupt Priority bit Peripheral Interrupt Flag bit Peripheral Interrupt Enable bit Peripheral Interrupt Priority bit TMR1IF TMR1IE TMR1IP XXXXIF XXXXIE XXXXIP Additional Peripheral Interrupts TMR1IF TMR1IE TMR1IP High Priority Interrupt Generation Low Priority Interrupt Generation XXXXIF XXXXIE XXXXIP Additional Peripheral Interrupts IPEN IPEN GIE/GIEH INT2IF INT2IE INT2IP INT2IF INT2IE INT2IP |
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