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PIC18F258-E/SOSQTP 数据表(PDF) 72 Page - Microchip Technology |
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PIC18F258-E/SOSQTP 数据表(HTML) 72 Page - Microchip Technology |
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72 / 402 page  PIC18FXX8 DS41159E-page 70 © 2006 Microchip Technology Inc. 6.4 Erasing Flash Program Memory The minimum erase block is 32 words or 64 bytes. Only through the use of an external programmer, or through ICSP control, can larger blocks of program memory be bulk erased. Word erase in the Flash array is not supported. When initiating an erase sequence from the micro- controller itself, a block of 64 bytes of program memory is erased. The Most Significant 16 bits of the TBLPTR<21:6> point to the block being erased. TBLPTR<5:0> are ignored. The EECON1 register commands the erase operation. The EEPGD bit must be set to point to the Flash program memory. The WREN bit must be set to enable write operations. The FREE bit is set to select an erase operation. For protection, the write initiate sequence for EECON2 must be used. A long write is necessary for erasing the internal Flash. Instruction execution is halted while in a long write cycle. The long write will be terminated by the internal programming timer. 6.4.1 FLASH PROGRAM MEMORY ERASE SEQUENCE The sequence of events for erasing a block of internal program memory location is: 1. Load Table Pointer with address of row being erased. 2. Set the EECON1 register for the erase operation: • set the EEPGD bit to point to program memory; • clear the CFGS bit to access program memory; • set the WREN bit to enable writes; • set the FREE bit to enable the erase. 3. Disable interrupts. 4. Write 55h to EECON2. 5. Write 0AAh to EECON2. 6. Set the WR bit. This will begin the row erase cycle. 7. The CPU will stall for duration of the erase (about 2 ms using internal timer). 8. Re-enable interrupts. EXAMPLE 6-2: ERASING A FLASH PROGRAM MEMORY ROW MOVLW upper (CODE_ADDR) ; load TBLPTR with the base MOVWF TBLPTRU ; address of the memory block MOVLW high (CODE_ADDR) MOVWF TBLPTRH MOVLW low (CODE_ADDR) MOVWF TBLPTRL ERASE_ROW BSF EECON1, EEPGD ; point to FLASH program memory BCF EECON1, CFGS ; access FLASH program memory BSF EECON1, WREN ; enable write to memory BSF EECON1, FREE ; enable Row Erase operation BCF INTCON, GIE ; disable interrupts MOVLW 55h MOVWF EECON2 ; write 55H Required MOVLW 0AAh Sequence MOVWF EECON2 ; write 0AAH BSF EECON1, WR ; start erase (CPU stall) NOP ; NOP needed for proper code execution BSF INTCON, GIE ; re-enable interrupts |
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