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Instruction Fetch Unit

The Instruction Fetch Unit (IFU) fetches instructions from the Instruction Tightly Coupled

Memory (ITCM), from the Low Latency RAM (LLRAM) port, or from the Main Master (MM)

port. The IFU predicts the outcome of branches in the instruction stream and passes the

instructions to the Data Processing Unit (DPU) for processing.

Data Processing Unit

The DPU decodes and executes instructions. It executes instructions that require data

transfer to or from the memory system by interfacing to the Load Store Unit (LSU). The DPU

includes the Generic Interrupt Controller (GIC) CPU interface, the Performance Monitoring

Unit (PMU) and the Advanced SIMD and floating-point support.

GIC CPU interface

The GIC CPU interface, when integrated with an external distributor component,

is a resource for supporting and managing interrupts in a cluster system.

PMU

The PMU provides six event counters that can be configured to gather statistics on the

operation of each core and the memory system. The information can be used for debug

and code profiling.

Advanced SIMD and floating-point support

Advanced SIMD is a media and signal processing architecture that adds instructions primarily

for audio, video, 3D graphics, image, speech processing, and machine learning. The

floating-point architecture provides support for half-precision, single-precision, and

double-precision floating-point operations. The Advanced SIMD architecture, its associated

implementations, and supporting software, are also referred to as Arm Neon™ technology.

Memory System

The Cortex-R82 processor memory system provides various memories and interfaces each

tailored to different requirements. The aim is to use some memories and interfaces for more

critical real-time requirements and some for less critical real-time requirements. However, the

more real-time critical context is also able to access the less real-time critical interfaces and

memories although such an access might not be desirable depending on the system design.