13

Glossary of Terms

CTI

Cross Trigger Interface

CTM

Cross Trigger Matrix

DAP

Debug Access Port

DED

Double Error Detect

DFT

Design for Test

DMA

Direct Memory Access

DPU

Data Processing Unit

DTCM

Data Tightly Coupled Memory

ECC

Error Correcting Code

ECT

Embedded Cross Trigger

ELA

Embedded Logic Analyzer

ETM

Embedded Trace Macrocell

GIC

Generic Interrupt Controller

IFU

Instruction Fetch Unit

ITCM

Instruction Tightly Coupled Memory

LLRAM

Low-latency RAM

LLPP

Low-latency Peripheral Port

LSU

Load Store Unit

MACP

Main Accelerator Coherency Port

MBIST

Memory Built-In Self-Test

ML

machine learning

MM

Main Master

MMU

Memory Management Unit

MPU

Memory Protection Unit

PMU

Performance Monitoring Unit

PMSA

Protected Memory System Architecture

PPUs

Power Policy Units

RAS

Reliability, Availability, and Serviceability

SB

Snoop Control Unit Bridge

SCP

System Control Processor

SECDED

Optional Single Error Correct Double Error Detect

SIMD

Single Instruction Multiple Data

SPP

Shared Peripheral Port

STU

STore buffer Unit

TCMs

Tightly Coupled Memories

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