WM8994ECSSLASHR datasheet(194/363 Pages) CIRRUS

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WM8994

194

Rev 4.6

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R513 (0201h)

AIF 1

Clocking (2)

5:3

AIF1DAC_DIV

000

Selects the AIF1 input path sample rate

relative to the AIF1 output path sample

rate.

This field should only be changed from

default in modes where the AIF1 input path

sample rate is slower than the AIF1 output

path sample rate.

000 = Divide by 1

001 = Divide by 1.5

010 = Divide by 2

011 = Divide by 3

100 = Divide by 4

101 = Divide by 5.5

110 = Divide by 6

111 = Reserved

2:0

AIF1ADC_DIV

000

Selects the AIF1 output path sample rate

relative to the AIF1 input path sample rate.

This field should only be changed from

default in modes where the AIF1 output

path sample rate is slower than the AIF1

input path sample rate.

000 = Divide by 1

001 = Divide by 1.5

010 = Divide by 2

011 = Divide by 3

100 = Divide by 4

101 = Divide by 5.5

110 = Divide by 6

111 = Reserved

R528 (0210h)

AIF1 Rate

7:4

AIF1_SR

1000

Selects the AIF1 Sample Rate (fs)

0000 = 8kHz

0001 = 11.025kHz

0010 = 12kHz

0011 = 16kHz

0100 = 22.05kHz

0101 = 24kHz

0110 = 32kHz

0111 = 44.1kHz

1000 = 48kHz

1001 = 88.2kHz

1010 = 96kHz

All other codes = Reserved

Note that 88.2kHz and 96kHz modes are

supported for AIF1 input (DAC playback)

only.

3:0

AIF1CLK_RAT

0011

Selects the AIF1CLK / fs ratio

0000 = Reserved

0001 = 128

0010 = 192

0011 = 256

0100 = 384

0101 = 512

0110 = 768

0111 = 1024

1000 = 1408

1001 = 1536

All other codes = Reserved

Table 106 AIF1 Clocking Configuration

WM8994ECS/R 数据表(PDF) 194 Page - Cirrus Logic

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