68HC05PL4 datasheet(5/98 Pages) FREESCALE

5 / 98 page

April 30, 1998

GENERAL RELEASE SPECIFICATION

MC68HC05PL4

REV 2.0

iii

TABLE OF CONTENTS

Section

Page

7.4

PORT C ........................................................................................................... 7-3

7.5

SUMMARY OF PORT A AND PORT B SHARED PINS.................................. 7-3

SECTION 8

SYSTEM CLOCKS

8.1

SYSTEM CLOCK SOURCE AND FREQUENCY OPTION.............................. 8-1

SECTION 9

16-BIT PROGRAMMABLE TIMER

9.1

TIMER REGISTERS (TMRH, TMRL)............................................................... 9-2

9.2

ALTERNATE COUNTER REGISTERS (ACRH, ACRL) .................................. 9-4

9.3

INPUT CAPTURE REGISTERS ...................................................................... 9-5

9.4

OUTPUT COMPARE REGISTERS ................................................................. 9-6

9.5

TIMER CONTROL REGISTER (TCR) ............................................................. 9-8

9.5.1

Miscellaneous Control and Status Register for Timer16 ............................. 9-9

9.6

TIMER STATUS REGISTER (TSR)............................................................... 9-10

9.7

16-BIT TIMER OPERATION DURING WAIT MODE..................................... 9-11

9.8

16-BIT TIMER OPERATION DURING STOP MODE .................................... 9-11

SECTION 10

8-BIT TIMER

10.1 OVERVIEW.................................................................................................... 10-1

10.2 TIMER8 CONTROL AND STATUS REGISTER (T8CSR)............................. 10-2

10.3 TIMER8 COUNTER REGISTER (T8CNTR) .................................................. 10-3

10.4 COMPUTER OPERATING PROPERLY (COP) WATCHDOG ...................... 10-3

10.5 8-BIT TIMER OPERATION DURING WAIT MODE....................................... 10-4

10.6 8-BIT TIMER OPERATION DURING STOP MODE ...................................... 10-4

SECTION 11

DIGITAL TO ANALOG CONVERTER

11.1 DAC CONTROL AND DATA REGISTER ...................................................... 11-1

11.2 DAC OPERATION DURING WAIT MODE .................................................... 11-1

11.3 DAC OPERATION DURING STOP MODE.................................................... 11-1

11.4 DAC CHARACTERISTICS ............................................................................ 11-2

SECTION 12

INSTRUCTION SET

12.1 ADDRESSING MODES ................................................................................. 12-1

12.1.1

Inherent...................................................................................................... 12-1

12.1.2

Immediate.................................................................................................. 12-1

12.1.3

Direct ......................................................................................................... 12-2

12.1.4

Extended.................................................................................................... 12-2

12.1.5

Indexed, No Offset..................................................................................... 12-2

12.1.6

Indexed, 8-Bit Offset.................................................................................. 12-2

Freescale Semiconductor, Inc.

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