| 数据搜索系统,热门电子元器件搜索 |
|
SLAS366 数据表(PDF) 22 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
SLAS366 数据表(HTML) 22 Page - Texas Instruments |
|
22 / 58 page ![]() 3–10 SCL SDA A5 A4 A3 A2 A1 A0 0 ACK B7 B6 B5 B4 B3 R2 R1 R0 6 A6 ACK 54 SCL SDA A5 A4 A3 A2 A1 A0 0 ACK D7 D6 D5 D4 D3 D2 D1 D0 A6 D7 D6 D5 D4 D3 D2 D1 D0 ACK ACK Start Bit = 0 Programmable I2C Device Address Set by Control Register 2 SMARTDM Device Address (see Table 3-1) Index Register Address (Index) Stop Bit = 1 xxxxx = Don’t Care Start Bit = 0 SMARTDM Device Address (see Table 3-1) Control Register Data (Index) Control Register Data (Index+1) I2C Read Sequence I2CI2C I2C 65 4 Programmable I2C Device Address Set by Control Register 2 I2CI2C I2C Figure 3–11. I2C Read Sequence Each AIC has an index register address. To perform a write operation, make the LSB of the first byte as 0 (write) (see Figure 3–12). During the second byte, the index register address is initialized and mode (broadcast/default) is set. From the third byte onwards, write data to the control register (given by index register) and increment the index register until stop or repeated start occurs. For operation, make the LSB of the first byte as 1 (read). From the second byte onwards, AIC starts transmitting data from the control register (given by the index register) and increments the index register. For setting the index register perform operation the same as write case for 2 bytes, and then give a stop or repeated start. S/Sr –> Start/Repeated Start. S/Sr I2C Device Address (3 Bit)+ Dtdmsp Device Address (+) R/W = 0 Mode (5 Bit) + Index Reg Address (3 Bit) Ack Ack Control Reg. Data (Write) Ack Control Reg. Data (Write) 7 Bit 1 Bit 8 Bit 8 Bit 8 Bit Increment Index Reg. Address Default/Broadcast (00000/11111) Write Mode To The Address Given by Index Reg. Address To The Address Given by Index Reg. Address S/Sr I2C Device Address (3 Bit)+ Dtdmsp Device Address (+) R/W = 1 Control Reg. Data (Read) Ack Ack Control Reg. Data (Read) Ack 7 Bit 1 Bit 8 Bit 8 Bit Read Mode From The Address Given by Index Reg. Address From The Address Given by Index Reg. Address Increment Index Reg. Address Increment Index Reg. Address S/Sr I2C Device Address (3 Bit)+ Dtdmsp Device Address (+) R/W = 0 Mode (5 Bit) + Index Reg. Address (3 Bit) Ack Ack 7 Bit 1 Bit 8 Bit For Initializing Index Reg Address Stop Figure 3–12. Index Register Addresses |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |