SLAS366 datasheet(42/58 Pages) TI2

部件名	SLAS366

功能描述	Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port

PDF	58 Pages

Scroll/Zoom	100%

制造商	TI2 [Texas Instruments]

网页	https://www.ti.com

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42 / 58 page

5–6

5.11 Timing Requirements (see Parameter Measurement Information)

TEST CONDITIONS

MIN

TYP

MAX

UNIT

twH

Pulse duration, MCLK high

twL

Pulse duration, MCLK low

tsu1

Setup time, RESET, before MCLK high (see Figure 5–1)

th1

Hold time, RESET, after MCLK high (see Figure 5–1)

td1

Delay time, SCLK

↑ to FS/FSD↓

CL = 20 pF

td2

Delay time, SCLK

↑ to FS/FSD↑

td3

Delay time, SCLK

↑ to DOUT

ten

Enable time, SCLK

↑ to DOUT

tdis

Disable time, SCLK

↑ to DOUT

tsu2

Setup time, DIN, before SCLK

↓

th2

Hold time, DIN, after SCLK

↓

th1

2.4 V

MCLK

RESET

2.4 V

tsu1

2.4 V

twL

twH

Figure 5–1. Hardware Reset Timing

td1

td2

td1

td2

ten

td3

tdis

tsu2

th2

D15

SCLK

FSD

DOUT

DIN

Figure 5–2. Serial Communication Timing

NOTE: Above Figures are meant to show timing delays only.

SLAS366 数据表(PDF) 42 Page - Texas Instruments

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SLAS366 数据表(PDF) 42 Page - Texas Instruments

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