SLAS366 datasheet(27/58 Pages) TI2

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3–15

3.9.1

Data Frame Format

D15 – D1

A/D and D/A Data

D15 – D0

A/D and D/A Data

D15 – D0

DIN

(15+1) Bit Mode

(Continuous Data Transfer Mode Only)

DOUT

(16 Bit A/D Data)

DIN

16 Bit Mode

DOUT

16 Bit Mode

Control Frame

Request

Figure 3–18. Data Frame Format

3.9.2

Control Frame Format (Programming Mode)

During the control frame, the DSP sends 16-bit words to the SMARTDM(TM) through DIN to read or write control

registers shown in Table 3–3. The upper byte (Bits D15–D8) of the 16-bit control-frame word defines the read/write

command. Bits D15–D13 define the control register address with register content occupied the lower byte D7–D0.

Bit D12 is set to 0 for a write or to 1 for a read. Bit D11 in the write command is used to perform the broadcast mode.

During a register write, the register content is located in the lower byte of DIN. During a register read, the register

content is output in the lower byte of DOUT in the same control frame, whereas the lower byte of DIN is ignored.

3.9.3

Broadcast Register Write

Broadcast operation is very useful for a cascading system of SMARTDM DSP codecs in which all register

programming can be completed in one control frame. During the control frame and in any register-write time slot, if

the broadcast bit (D11) is set to 1, the register content of that time slot is written into the specified register of all devices

in cascade (see Figure 3–20). This reduces the DSP’s overhead of doing multiple writes to program same data into

cascaded devices.

D11

DIN (Read)

DIN (Write)

Don’t care

D15

D13

D14

D13

D14

D10

D11

DOUT (Read)

D15

D13

D14

D12

Data to be Written Into Register

D7 – D0

Address

SMARTDM Device

Address

R/W Broadcast

Address

Figure 3–19. Control Frame Data Format

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