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AMC7832IPAPR 数据表(PDF) 31 Page - Texas Instruments |
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AMC7832IPAPR 数据表(HTML) 31 Page - Texas Instruments |
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31 / 74 page  DAV 1 st CONVERSION of the channels specified in the ADC MUX Registers 2 nd CONVERSION of the channels specified in the ADC MUX Registers 1 st internal trigger a) Direct-Mode, software trigger 2 nd internal trigger DAV 1 st CONVERSION of the channels specified in the ADC MUX Registers b) Auto-Mode, software trigger 2 nd CONVERSION 3 rd CONVERSION 1µs CS Read Command >4µs Trigger Command Read Command Trigger Command 1 st internal trigger CS Read Command Trigger Command Read Command AMC7832 www.ti.com SLAS836 – MARCH 2014 8.3.2.3 ADC Synchronization A trigger signal is required for getting the ADC in and out of idle state. The ADC trigger can be generated either through software (ICONV bit in the ADC Trigger Register, 0xC0) or hardware (GPIO2/ADCTRIG, terminal 11). In order to use the GPIO2/ADCTRIG terminal as an ADC trigger, the terminal must be configured accordingly in the GPIO Configuration register (address 0x12). When the terminal is configured as a trigger, a falling edge starts the sampling and conversion of the ADC. The ADC Data registers (0x20 – 0x41) and Temperature Data registers (0x78 – 0x79) should only be accessed while the ADC is in idle state or between conversion sequences if the ADC is in auto-mode. A data available indicator signal is generated by the device to track the ADC status. Failure to satisfy the synchronization requirements could lead to erroneous data reads. The data available indicator signal is output through the GPIO3/DAV terminal. The GPIO3/DAV terminal must be configured in the GPIO Configuration register (address 0x12) as an interrupt. In addition to the terminal indicator the device provides a data available flag accessible through the serial interface (DAVF bit in the General Status Register, 0x72). The DAV terminal is available in both auto and direct-mode but the DAVF flag is only available in direct mode. The terminal and flag behavior are dependent on the conversion mode. In direct-mode, after the conversion is completed and the ADC returns to idle state, the DAVF bit is set immediately to ‘1’ and the DAV terminal is active (low) to indicate new data is available. The terminal and flag are cleared automatically once a new conversion is started or one of the ADC Data or Temperature Data registers is accessed. In auto-mode, the DAVF bit is fixed to ‘0’ and therefore synchronization is always done through the DAV terminal. After one auto-mode conversion sequence is complete a 1µs pulse (low) is issued on the DAV terminal. When an auto-mode conversion needs to be stopped it is recommended to do so in synchronization with DAV. Figure 45. ADC Software Trigger Synchronization Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 31 Product Folder Links: AMC7832 |
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