AMC7832IPAPR datasheet(47/74 Pages) TI2

47 / 74 page

AMC7832

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SLAS836 – MARCH 2014

Table 22. Register name: DAC Clear Enable 0 – Address: 0x18, Default: 0x00 (READ/WRITE)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

DAC Clear

0x18

CLREN-C1

This register determines which DACs go into clear state when a

Enable 0

clear event is detected as configured in the DAC-CLEAR-

CLREN-C0

SOURCE registers.

CLREN-B7

If CLRENn = '1', DAC_n is forced into a clear state with a clear

event.

CLREN-B6

If CLRENn = '0', a clear event does not affect the state of

CLREN-A11

DAC_n.

CLREN-A10

CLREN-A9

CLREN-A8

Table 23. Register name: DAC Clear Enable 1 – Address: 0x19, Default: 0x00 (READ/WRITE)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

DAC Clear

0x19

7:4

Reserved

Reserved for factory use

All zeros

Enable 1

CLREN-D5

This register determines which DACs go into clear state when a

clear event is detected as configured in the DAC-CLEAR-

CLREN-D4

SOURCE registers.

CLREN-D3

If CLRENn = '1', DAC_n is forced into a clear state with a clear

event.

CLREN-D2

If CLRENn = '0', a clear event does not affect the state of

DAC_n.

8.5.5 DAC Clear And ALARMOUT Source Select: Address 0x1A – 0x1D

Table 24. Register name: Register name: DAC Clear Source 0 – Address: 0x1A, Default: 0x00

(READ/WRITE)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

DAC Clear

0x1A

7:5

Reserved

Reserved for factory use

000

Source 0

ADC16-ALR-CLR

This register selects which alarm forces DACs into a clear state,

regardless of which DAC operation mode is active, auto or

ADC15-ALR-CLR

manual. In order for DAC_n to go into clear mode, it must be

ADC14-ALR-CLR

enabled in the DAC Clear Enable registers.

ADC13-ALR-CLR

ADC12-ALR-CLR

Table 25. Register name: Register name: DAC Clear Source 1 – Address: 0x1B, Default: 0x00

(READ/WRITE)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

DAC Clear

0x1B

7:4

Reserved

Reserved for factory use

0000

Source 1

ALARMIN-ALR

This register selects which alarm forces DACs into a clear state,

regardless of which DAC operation mode is active, auto or

THERM-ALR

manual. In order for DAC_n to go into clear mode, it must be

LT-HIGH-ALR

enabled in the DAC Clear Enable registers.

LT-LOW-ALR

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