AMC7832IPAPR datasheet(44/74 Pages) TI2

44 / 74 page

AMC7832

SLAS836 – MARCH 2014

www.ti.com

Table 10. Register name: Chip ID low byte – Address: 0x04, Default: 0x32 (READ ONLY)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

Chip ID Low

0x04

7:0

CHIPID-LOW

Chip ID. Low byte

0x32

Byte

Table 11. Register name: Chip ID high byte – Address: 0x05, Default: 0x0C (READ ONLY)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

Chip ID

0x05

7:0

CHIPID-HIGH

Chip ID. High byte

0x0C

High Byte

Table 12. Register name: Version ID – Address: 0x06, Default: 0x00 (READ ONLY)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

Version ID

0x06

7:0

VERSIONID

AMC7832 Version ID. Subject to change.

0x00

Table 13. Register name: Manufacturer ID low byte – Address: 0x0C, Default: 0x51 (READ ONLY)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

Manuf. ID

0x0C

7:0

VENDORID-LOW

Manufacturer ID. Low byte

0x51

Low Byte

Table 14. Register name: Manufacturer ID high byte – Address: 0x0D, Default: 0x04 (READ ONLY)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

Manuf. ID

0x0D

7:0

VENDORID-HIGH Manufacturer ID. High byte

0x04

High Byte

8.5.3 Register Update (Buffered Registers): Address 0x0F

Table 15. Register name: Register Update – Address: 0x0F, Default: 0x00 (SELF CLEARING)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

0x0F

7:1

Reserved

Reserved for factory use

All zeros

Update

UPDATE

Update (self clearing)

0: disabled

1: enabled – transfers data from buffers to active registers (DAC

registers only)

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