AMC7832IPAPR datasheet(52/74 Pages) TI2

52 / 74 page

AMC7832

SLAS836 – MARCH 2014

www.ti.com

Table 45. Register name: LT-Lower-Thresh (low byte) – Address: 0x96, Default: 0x00 (READ/WRITE)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

LT Lower

0x96

7:0

THRL-LT(7:0)

Sets 12-bit lower threshold value for the local temperature sensor

0x00

Thresh (low)

in two’s complement format.

Table 46. Register name: LT-Lower-Thresh (high byte) – Address: 0x97, Default: 0x08 (READ/WRITE)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

LT Lower

0x97

7:4

Reserved

Reserved for factory use.

All zeros

Thresh

3:0

THRL-LT(11:8)

Sets 12-bit lower threshold value for the local temperature sensor

0x08

(high)

in two’s complement format.

8.5.12 Hysteresis: Address 0xA0 – 0xA5

The hysteresis registers define the hysteresis in the out-of-range alarms.

Table 47. Register name: ADCn-Hysteresis – Address: 0xA0 - 0xA4, Default: 0x08 (READ/WRITE)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

ADCn

0xA0 to

Reserved

Reserved for factory use.

Hysterisis

0xA4

6:0

HYSTn(6:0)

Hysteresis of unipolar LV_ADCn, 1 LSB per step

0x08

Table 48. Register name: LT-Hysteresis – Address: 0xA5, Default: 0x08 (READ/WRITE)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

0xA5

7:5

Reserved

Reserved for factory use.

000

Hysterisis

4:0

HYST-LT(4:0)

Hysteresis of local temperature sensor, 1°C per step. The range

All zeros

is 0°C to 31°C.

8.5.13 Power-Down Registers: Address 0xB0 – 0xB3

Table 49. Register name: DAC Clear 0 – Address: 0xB0, Default: 0x00 (READ/WRITE)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

DAC Clear

0xB0

CLR-C1

This register uses software to force the DAC into a clear state.

If CLRn = '1', DAC_n is forced into a clear state.

CLR-C0

If CLRn = '0', DAC_n is restored to normal operation.

CLR-B7

CLR-B6

CLR-A11

CLR-A10

CLR-A9

CLR-A8

Table 50. Register name: DAC Clear 1 – Address: 0xB1, Default: 0x00 (READ/WRITE)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

DAC Clear

0xB1

7:4

Reserved

Reserved for factory use

All zeros

CLR-D5

This register uses software to force the DAC into a clear state.

If CLRn = '1', DAC_n is forced into a clear state.

CLR-D4

If CLRn = '0', DAC_n is restored to normal operation.

CLR-D3

CLR-D2

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