AMC7832IPAPR datasheet(33/74 Pages) TI2

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ALARM STATUS 0

0x70

RESERVED

LV_ADC16 Alarm

LV_ADC15 Alarm

LV_ADC14 Alarm

LV_ADC13 Alarm

LV_ADC12 Alarm

ALARM STATUS 1

0x71

RESERVED

ALARMIN

Alarm

Die Temperature Alarm

Temp. Sensor High Alarm

Temp. Sensor Low Alarm

GALR

AMC7832

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SLAS836 – MARCH 2014

8.3.2.4 Programmable Out-of-Range Alarms

The AMC7832 is capable of continuously analyzing the 5 external unipolar inputs and internal temperature

sensor conversion results for normal operation.

Normal operation is established through the Lower and Upper Threshold registers (address 0x80 – 0x97). When

any of the monitored inputs is out of the specified range, an alarm event is issued and the global alarm bit, GALR

in the General Status register (0x72) is set. Details on the source of the alarm event can be determined through

the Alarm Status registers (0x70 – 0x71).

The ALARM-LATCH-DIS bit in the ALARMOUT Source 1 register (address 0x1D) sets the latching behavior for

all alarms (except for the ALARMIN alarm which is always unlatched). When the ALARM-LATCH-DIS bit is

cleared to ‘0’ the alarm bits in the Alarm Status registers are latched. The alarm bits are referred to as being

latched because they remain set until read by software. This design ensures that out-of-limit events cannot be

missed if the software is polling the device periodically. The alarm bits are cleared when their corresponding

Alarm Status register is read, and are reasserted if the out-of limit condition still exists on the next monitoring

cycle, unless otherwise noted. When the ALARM-LATCH-DIS bit is set to ‘1’, the alarm bits are not latched. The

alarm bits in the Alarm Status registers go to '0' when the error condition subsides, regardless of whether the bit

is read or not.

Figure 47. AMC7832 Alarm Status Register

All of the alarms can be set to activate the ALARMOUT terminal. The GPIO1/ALARMOUT terminal must be

configured accordingly in the GPIO Configuration register (address 0x12) to enable this functionality. The

ALARMOUT terminal works as an interrupt to the host so that it may query the Alarm Status registers to

determine the alarm source. Any alarm event can activate the terminal as long as the alarm is not masked in the

ALARMOUT Source registers (address 0x1C – 0x1D). When an alarm event is masked, the occurrence of the

event sets the corresponding status bit in the Alarm Status registers to '1', but does not activate the ALARMOUT

terminal.

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