AMC7836IPAPRG4 datasheet(43/91 Pages) TI2

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R/W A14 A13 A12 A11 A10

SCLK

SDI

SDO

R/W

SCLK

SDI

SDO

A14 A13 A12 A11 A10

AMC7836

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SLAS986D – NOVEMBER 2014 – REVISED FEBRUARY 2018

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7.5 Programming

The AMC7836 device is controlled through a flexible four-wire serial interface that is compatible with SPI-type

interfaces used on many microcontrollers and DSP controllers. The interface provides read and write (R/W)

access to all registers of the AMC7836 device.

Each serial-interface access cycle is exactly (N + 2) bytes long, where N is the number of data bytes. Asserting

the CS pin low initiates a frame. The frame ends when the CS pin is deasserted high. In MSB-first mode, the first

bit transferred is the R/W bit. The next 15 bits are the register address (32768 addressable registers), and the

remaining bits are data. For all writes, data is committed in bytes as the eight data bit of a data field that is

clocked in on the rising edge of SCLK. If the write access is not an even multiple of 8 clocks, the trailing data bits

are not committed. On a read access, data is clocked out on the falling edge of the serial interface clock, SCLK,

on the SDO pin.

Figure 61 and Figure 62 show the access protocol used by the interface.

Figure 61. Serial Interface Write Bus Cycle

Figure 62. Serial Interface Read Bus Cycle

Streaming mode is supported for operations that require large amounts of data to be passed to or from the

AMC7836. In streaming mode multiple bytes of data can be written to or read from the AMC7836 without

specifically providing instructions for each byte. Streaming mode is implemented by continually holding the CS

pin active and continuing to shift new data in or old data out of the device.

The instruction phase includes the starting address. The AMC7836 device begins reading or writing data to this

address and continues as long as the CS pin is asserted and single byte writes have not been enabled in the

interface configuration 1 register (address 0x01). The AMC7836 device automatically increments or decrements

the address depending on the setting of the address ascension bit in the interface configuration 0 register

(address 0x00).

If the address is decrementing and address 0x0000 is reached, the next address used is 0x7FFF. If the address

is incrementing and address 0x7FFF is reached, the next address used is 0x0000. Care should be taken when

writing to address 0x0000 and 0x0001 as writing to these addresses may change the configuration of the serial

interface. Therefore address 0x0010 should be the first (ascending) or last (descending) address accessed in

streaming mode.

Figure 63 and Figure 64 show the access protocol used in streaming mode.

AMC7836IPAPRG4 数据表(PDF) 43 Page - Texas Instruments

AMC7836IPAPRG4 数据表(HTML) 43 Page - Texas Instruments

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