AMC7836IPAPRG4 datasheet(6/91 Pages) TI2

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AMC7836

SLAS986D – NOVEMBER 2014 – REVISED FEBRUARY 2018

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Pin Functions (continued)

DESCRIPTION

NAME

NO.

I/O

DAC_C8

DAC group C. These DAC channels share the same range and clamp voltage.

DAC_C9

DAC_C10

DAC_C11

DAC_D12

DAC group D. These DAC channels share the same range and clamp voltage.

DAC_D13

DAC_D14

DAC_D15

DGND

Digital ground. This pin is the ground reference point for all digital circuitry on the device.

Ideally, the analog and digital grounds should be at the same potential (GND) and must not

differ by more than ±0.3 V.

DVDD

Digital supply voltage (4.7 V to 5.5 V). This pin must have the same value as the AVDD pin.

GPIO0/ALARMIN

I/O

General-purpose digital I/O 0 (default). This pin is a bidirectional digital input/output (I/O) with

an internal 48-k

Ω pullup resistor to the IOVDD pin. Alternatively the pin can be set to operate

as the digital input ALARMIN which is an active-low alarm-control signal. If unused this pin can

be left floating.

GPIO0/ALARMOUT

I/O

General purpose digital I/O 1 (default). This pin is a bidirectional digital I/O with an internal 48-

Ω pullup resistor to the IOVDD pin. Alternatively the pin can be set to operate as ALARMOUT

which is an open drain global alarm output. This pin goes low (active) when an alarm event is

detected. If unused this pin can be left floating.

GPIO2/ADCTRIG

I/O

General purpose digital I/O 2 (default). This pin is a bidirectional digital I/O with internal 48-k

Ω

pullup resistor to the IOVDD pin. Alternatively the pin can be set to operate as ADCTRIG which

is an active-low external conversion trigger. The falling edge of this pin begins the sampling

and conversion of the ADC. If unused this pin can be left floating.

GPIO3/DAV

I/O

General purpose digital I/O 3 (default). This pin is a bidirectional digital I/O with internal 48-k

Ω

pullup resistor to the IOVDD pin. Alternatively the pin can be set to operate as DAV which is an

active-low data-available indicator output. In direct mode, the DAV pin goes low (active) when

the conversion ends. In auto mode, a 1-µs pulse (active low) appears on this pin when a

conversion cycle finishes. The DAV pin remains high when deactivated. If unused this pin can

be left floating.

GPIO4

I/O

General purpose digital I/O. These pins are bidirectional digital I/Os with an internal 48-k

Ω

pullup resistor to the IOVDD pin. If unused these pins can be left floating.

GPIO5

I/O

GPIO6

I/O

GPIO7

I/O

IOVDD

I/O supply voltage (1.8 V to 5.5 V). This pin sets the I/O operating voltage and threshold levels.

The voltage on this pin must not be greater than the value of the DVDD pin.

LV_ADC16

General purpose analog inputs. These channels are used for general monitoring. The input

range of these pins is 0 to 2 × Vref.

LV_ADC17

LV_ADC18

LV_ADC19

LV_ADC20

REF_CMP

Internal-reference compensation-capacitor connection. Connect a 4.7-μF capacitor between

this pin and the AGND2 pin.

RESET

Active-low reset input. Logic low on this pin causes the device to perform a hardware reset.

SCLK

Serial interface clock.

SDI

Serial-interface data input. Data is clocked into the input shift register on each rising edge of

the SCLK pin.

SDO

Serial-interface data output. The SDO pin is in high impedance when the CS pin is high. Data

is clocked out of the input shift register on each falling edge of the SCLK pin.

Thermal Pad

—

The thermal pad is located on the bottom-side of the device package. The thermal pad should

be tied to the same potential as the AVEE pin or left disconnected.

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