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XIO2001IPNP 数据表(PDF) 87 Page - Texas Instruments |
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XIO2001IPNP 数据表(HTML) 87 Page - Texas Instruments |
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87 / 145 page  Table 8-57. Serial IRQ Edge Control Register Description (continued) BIT FIELD NAME ACCESS DESCRIPTION 10(1) IRQ10_MODE RW IRQ 10 edge mode 0 = Edge mode (default) 1 = Level mode 9(1) IRQ9_MODE RW IRQ 9 edge mode 0 = Edge mode (default) 1 = Level mode 8(1) IRQ8_MODE RW IRQ 8 edge mode 0 = Edge mode (default) 1 = Level mode 7(1) IRQ7_MODE RW IRQ 7 edge mode 0 = Edge mode (default) 1 = Level mode 6(1) IRQ6_MODE RW IRQ 6 edge mode 0 = Edge mode (default) 1 = Level mode 5(1) IRQ5_MODE RW IRQ 5 edge mode 0 = Edge mode (default) 1 = Level mode 4(1) IRQ4_MODE RW IRQ 4 edge mode 0 = Edge mode (default) 1 = Level mode 3(1) IRQ3_MODE RW IRQ 3 edge mode 0 = Edge mode (default) 1 = Level mode 2(1) IRQ2_MODE RW IRQ 2 edge mode 0 = Edge mode (default) 1 = Level mode 1(1) IRQ1_MODE RW IRQ 1 edge mode 0 = Edge mode (default) 1 = Level mode 0(1) IRQ0_MODE RW IRQ 0 edge mode 0 = Edge mode (default) 1 = Level mode (1) These bits are reset by a PCI Express reset ( PERST), a GRST, or the internally-generated power-on reset. 8.4.75 Serial IRQ Status Register This register indicates when a level mode IRQ is signaled on the serial IRQ stream. After a level mode IRQ is signaled, a write-back of 1b to the asserted IRQ status bit re-arms the interrupt. IRQ interrupts that are defined as edge mode in the serial IRQ edge control register are not reported in this status register. See Table 8-58 for a complete description of the register contents. PCI register offset: E4h Register type: Read/Clear Default value: 0000h BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Table 8-58. Serial IRQ Status Register Description BIT FIELD NAME ACCESS DESCRIPTION 15(1) IRQ15 RCU IRQ 15 asserted. This bit indicates that the IRQ15 has been asserted. 0 = Deasserted 1 = Asserted 14(1) IRQ14 RCU IRQ 14 asserted. This bit indicates that the IRQ14 has been asserted. 0 = Deasserted 1 = Asserted www.ti.com XIO2001 SCPS212J – MAY 2009 – REVISED JANUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 87 Product Folder Links: XIO2001 |
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