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STM32F427AI 数据表(PDF) 143 Page - STMicroelectronics

部件名 STM32F427AI
功能描述  32b Arm® Cortex®-M4 MCUFPU, 225DMIPS, up to 2MB Flash/2564KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 com. interfaces, camera & LCD-TFT
PDF  240 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F427AI 数据表(HTML) 143 Page - STMicroelectronics

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DS9405 Rev 12
143/240
STM32F427xx STM32F429xx
Electrical characteristics
197
SPI interface characteristics
Unless otherwise specified, the parameters given in Table 63 for the SPI interface are
derived from tests performed under the ambient temperature, fPCLKx frequency, and VDD
supply voltage conditions summarized in Table 17, with the following configuration:
•
Output speed is set to OSPEEDRy[1:0] = 10
•
Capacitive load C = 30 pF
•
Measurement points are done at CMOS levels: 0.5VDD
Refer to Section 6.3.17: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS, SCK, MOSI, MISO for SPI).
Table 62. I2C analog filter characteristics(1)
1. Specified by design.
Symbol
Parameter
Min
Max
Unit
tAF
Maximum pulse width of spikes that
are suppressed by the analog filter
50(2)
2. Spikes with widths below tAF(min) are filtered.
260(3)
3. Spikes with widths above tAF(max) are not filtered
ns
Table 63. SPI dynamic characteristics(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master mode, SPI1/4/5/6,
2.7 V≤VDD≤3.6 V
--
45
MHz
Slave mode,
SPI1/4/5/6,
2.7 V≤VDD≤3.6 V
Receiver
45
Transmitter/
full-duplex
38(2)
Master mode, SPI1/2/3/4/5/6,
1.7 V≤VDD≤3.6 V
--
22.5
Slave mode, SPI1/2/3/4/5/6,
1.7 V≤VDD≤3.6 V
22.5
Duty(SCK)
Duty cycle of SPI clock
frequency
Slave mode
30
50
70
%



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