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STM32F427AI 数据表(PDF) 146 Page - STMicroelectronics

部件名 STM32F427AI
功能描述  32b Arm® Cortex®-M4 MCUFPU, 225DMIPS, up to 2MB Flash/2564KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 com. interfaces, camera & LCD-TFT
PDF  240 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F427AI 数据表(HTML) 146 Page - STMicroelectronics

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Electrical characteristics
STM32F427xx STM32F429xx
146/240
DS9405 Rev 12
Figure 40. SPI timing diagram - master mode
I2S interface characteristics
Unless otherwise specified, the parameters given in Table 64 for the I2S interface are
derived from tests performed under the ambient temperature, fPCLKx frequency, and VDD
supply voltage conditions summarized in Table 17, with the following configuration:
•
Output speed is set to OSPEEDRy[1:0] = 10
•
Capacitive load C = 30 pF
•
Measurement points are done at CMOS levels: 0.5VDD
Refer to Section 6.3.17: I/O port characteristics for more details on the input/output alternate
function characteristics (CK, SD, WS).
MSv72626V1
th(MI)
tc(SCK)
tw(SCKH)
tw(SCKL)
tsu(MI)
NSS input
CPHA=0
CPOL=0
CPHA=0
CPOL=1
MOSI output
MISO input
First bit OUT
Last bit OUT
Next bits OUT
First bit IN
Last bit IN
Next bits IN
CPHA=1
CPOL=0
CPHA=1
CPOL=1
High
tv(MO)
th(MO)
Table 64. I2S dynamic characteristics(1)
Symbol
Parameter
Conditions
Min
Max
Unit
fMCK
I2S Main clock output
-
256x8K
256xFs(2)
MHz
fCK
I2S clock frequency
Master data: 32 bits
-
64xFs
MHz
Slave data: 32 bits
-
64xFs
DCK
I2S clock frequency duty cycle Slave receiver
30
70
%



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