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STM32F427AI 数据表(PDF) 177 Page - STMicroelectronics

部件名 STM32F427AI
功能描述  32b Arm® Cortex®-M4 MCUFPU, 225DMIPS, up to 2MB Flash/2564KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 com. interfaces, camera & LCD-TFT
PDF  240 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F427AI 数据表(HTML) 177 Page - STMicroelectronics

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DS9405 Rev 12
177/240
STM32F427xx STM32F429xx
Electrical characteristics
197
Figure 59. Synchronous multiplexed NOR/PSRAM read timings
Table 95. Synchronous multiplexed NOR/PSRAM read timings(1)(2)
Symbol
Parameter
Min
Max
Unit
tw(CLK)
FMC_CLK period
2THCLK − 1
-
ns
td(CLKL-NExL)
FMC_CLK low to FMC_NEx low (x=0..2)
-
0
ns
td(CLKH_NExH)
FMC_CLK high to FMC_NEx high (x= 0…2)
THCLK
-ns
td(CLKL-NADVL)
FMC_CLK low to FMC_NADV low
-
0
ns
td(CLKL-NADVH) FMC_CLK low to FMC_NADV high
0
-
ns
td(CLKL-AV)
FMC_CLK low to FMC_Ax valid (x=16…25)
-
0
ns
td(CLKH-AIV)
FMC_CLK high to FMC_Ax invalid (x=16…25)
0
-
ns
td(CLKL-NOEL)
FMC_CLK low to FMC_NOE low
-
THCLK+0.5
ns
td(CLKH-NOEH)
FMC_CLK high to FMC_NOE high
THCLK − 0.5
-
ns
td(CLKL-ADV)
FMC_CLK low to FMC_AD[15:0] valid
-
0.5
ns
td(CLKL-ADIV)
FMC_CLK low to FMC_AD[15:0] invalid
0
-
ns
FMC_CLK
FMC_NEx
FMC_NADV
FMC_A[25:16]
FMC_NOE
FMC_AD[15:0]
AD[15:0]
D1
D2
FMC_NWAIT
(WAITCFG = 1b,
WAITPOL + 0b)
FMC_NWAIT
(WAITCFG = 0b,
WAITPOL + 0b)
tw(CLK)
tw(CLK)
Data latency = 0
BUSTURN = 0
td(CLKL-NExL)
td(CLKH-NExH)
t d(CLKL-NADVL)
td(CLKL-AV)
td(CLKL-NADVH)
td(CLKH-AIV)
td(CLKL-NOEL)
td(CLKH-NOEH)
td(CLKL-ADV)
td(CLKL-ADIV)
tsu(ADV-CLKH)
th(CLKH-ADV)
tsu(ADV-CLKH)
th(CLKH-ADV)
tsu(NWAITV-CLKH)
th(CLKH-NWAITV)
tsu(NWAITV-CLKH)
th(CLKH-NWAITV)
tsu(NWAITV-CLKH)
th(CLKH-NWAITV)
MS32757V1



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