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STM32F427AI 数据表(PDF) 178 Page - STMicroelectronics

部件名 STM32F427AI
功能描述  32b Arm® Cortex®-M4 MCUFPU, 225DMIPS, up to 2MB Flash/2564KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 com. interfaces, camera & LCD-TFT
PDF  240 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F427AI 数据表(HTML) 178 Page - STMicroelectronics

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Electrical characteristics
STM32F427xx STM32F429xx
178/240
DS9405 Rev 12
Figure 60. Synchronous multiplexed PSRAM write timings
tsu(ADV-CLKH)
FMC_A/D[15:0] valid data before FMC_CLK
high
5
-
ns
th(CLKH-ADV)
FMC_A/D[15:0] valid data after FMC_CLK high
0
-
ns
tsu(NWAIT-CLKH) FMC_NWAIT valid before FMC_CLK high
4
-
ns
th(CLKH-NWAIT)
FMC_NWAIT valid after FMC_CLK high
0
-
ns
1. CL = 30 pF.
2. Evaluated by characterization.
Table 95. Synchronous multiplexed NOR/PSRAM read timings(1)(2) (continued)
Symbol
Parameter
Min
Max
Unit
FMC_CLK
FMC_NEx
FMC_NADV
FMC_A[25:16]
FMC_NWE
FMC_AD[15:0]
AD[15:0]
D1
D2
FMC_NWAIT
(WAITCFG = 0b,
WAITPOL + 0b)
tw(CLK)
tw(CLK)
Data latency = 0
BUSTURN = 0
td(CLKL-NExL)
td(CLKH-NExH)
td(CLKL-NADVL)
td(CLKL-AV)
td(CLKL-NADVH)
td(CLKH-AIV)
td(CLKH-NWEH)
td(CLKL-NWEL)
td(CLKH-NBLH)
td(CLKL-ADV)
td(CLKL-ADIV)
td(CLKL-Data)
tsu(NWAITV-CLKH)
th(CLKH-NWAITV)
MS32758V1
td(CLKL-Data)
FMC_NBL



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