SERCON410B datasheet(23/34 Pages) STMICROELECTRONICS

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CONTROL REGISTER ADDRESSES (Continued)

A6-1

Bit

Name

R/W

Value

Function

DMAREQT

DMA request of transmit FIFO inactive

DMA request of transmit FIFO active

DMAREQR

DMA request of receive FIFO inactive

DMA request of receive FIFO active

IDLE

Level at IDLE pin

RECACTN

Level at RECACTN pin

INT_n

Interrupt event has not occurred

Interrupt flag active, interrupt event has occurred

CLR_INT_n

Do not modify interrupt flag

Clear interrupt flag

INT_RDIST

R/W

Interrupt receive data distorted

INT_FIBBR

R/W

Interrupt no receive data

INT_COMBLK0

R/W

Interrupt start transmission block 0

INT_COMBLK1

R/W

Interrupt start transmission block 1

INT_COMEND

R/W

Interrupt end of transmission block

INT_PHAS0

R/W

Interrupt phase MST = 0.

INT_PHASERR

R/W

Interrupt phase MST errored

INT_MSTEARLY

R/W

Interrupt communication cycle start too early

INT_MSTLATE

R/W

Interrupt communication cycle start too late

INT_MSTMISS

R/W

Interrupt MST missing twice

INT_TSTART

R/W

Interrupt start of transmit telegram

INT_TEND

R/W

Interrupt end of transmit telegram

INT_RWAIT

R/W

Interrupt start waiting for receive telegram

INT_RSTART

R/W

Interrupt start of receive telegram

INT_REND

R/W

Interrupt end of receive telegram

INT_RERR

R/W

Interrupt error of receive telegram

0-7

INT_SC_0-7

R/W

Interrupt service container

INT_RMISS

R/W

Interrupt receive telegram missing twice

9-12

INT_TIME0-3

R/W

Interrupt time TINT0-3

INT_DIVCLK

R/W

Interrupt DIVCLK signal

INT_PROGERR

R/W

Interrupt programming error

INT_NEWADR

R/W

Interrupt address change

SERCON410B

19/30

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