ST10C167 datasheet(22/65 Pages) STMICROELECTRONICS

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ST10C167

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XI - PARALLEL PORTS

The ST10C167 provides up to 111 I/O lines orga-

nized into eight input/output ports and one input

port.

All port lines are bit-addressable, and all input/out-

put lines are individually (bit-wise) programmable

as input or output via direction registers. The I/O

ports are true bidirectional ports which are

switched to high impedance state when config-

ured as inputs.

The output drivers of five I/O ports can be config-

ured (pin by pin) for push/pull operation or

open-drain operation via control registers. During

the internal reset, all port pins are configured as

inputs.

The input threshold of Port 2, Port 3, Port 7 and

Port 8 is selectable (TTL-or CMOS-like), where

the special CMOS-like input threshold reduces

noise sensitivity due to the input hysteresis.

The input thresholds are selected with bit of

PICON register dedicated to blocks of 8 input pins

(2-bit for port2, 2-bit for port3, 1-bit for port7, 1-bit

for port8).

All pins of I/O ports also support an alternate pro-

grammable function:

– Port0 and Port1 may be used as address and

data lines when accessing external memory.

– Port 2, Port 7 and Port 8 are associated with the

capture inputs or with the compare outputs of

the CAPCOM units and/or with the outputs of

the PWM module.

– Port 3 includes the alternate functions of timers,

serial interfaces, the optional bus control signal

BHE and the system clock output (CLKOUT).

– Port 4 outputs the additional segment address

bits A16 to A23 in systems where segmentation

is enabled to access more than 64K Byte of

memory.

– Port 5 is used as analog input channels of the

A/D converter or as timer control signals.

– Port 6 provides optional bus arbitration signals

(BREQ, HLDA, HOLD) and chip select signals.

All port lines that are not used for alternate func-

tions may be used as general purpose I/O lines.

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