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ST20C2 数据表(PDF) 74 Page - STMicroelectronics |
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ST20C2 数据表(HTML) 74 Page - STMicroelectronics |
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74 / 212 page  dist ® 74/212 dist disable timer Code: 22 FE Description: Disable a timer guard in an alternative sequence. Areg is the offset from the byte following the altend to the start of the guarded process, Breg is the boolean guard and Creg is the time after which this guard will be ready. If this is the first ready guard then the value in Areg is stored in pw.Temp, and Areg is set to true. Note that this instruction should be used as part of an alternative sequence following a taltwt instruction. Definition: if (Breg = false)– boolean guard is false Areg ′← false else if (word[Wptr @ pw.TLink] = TimeNotSet.p) – no timer is ready Areg ′← false else if (word[Wptr @ pw.TLink] = TimeSet.p) – a timer is ready { if not (word[Wptr @ pw.Time] after Creg) – but not this one Areg ′← false else if (word[Wptr @ pw.Temp] = NoneSelected.o) – this is the first ready guard { word ′[Wptr @ pw.Temp] ← Areg Areg ′← true } else – a previous guard selected Areg ′← false } else Areg ′← false Remove this process from the timer list Breg ′← undefined Creg ′← undefined Error signals: none Comments: Secondar y instruction. Instruction is interruptible. Uses the pw.Temp slot in the process workspace. See also: altend enbt talt taltwt |
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