ST20C2 datasheet(6/212 Pages) STMICROELECTRONICS

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1.3

Description

The description section provides an indication of the purpose of the instruction as well

as a summary of the behavior. This includes details of the use of registers, whose

initial values may be used as parameters and into which results may be stored.

Example

The

add instruction contains the following description:

Description: Add Areg and Breg, with checking for overflow.

1.4

Definition

The definition section provides a formal description of the behavior of the instruction.

The behavior is defined in ter ms of its effect on the state of the processor (i.e. the

values in registers and memory before and after the instruction has executed).

The effects of the instruction on registers, etc. are given as relationships of the

following form:

′← expression involving registers, etc.

Primed names (e.g. Areg

′ ) represent values after instruction execution, while

unprimed names represent values when instruction execution starts. For example,

Areg represents the value in Areg before the execution of the instruction while Areg

′

represents the value in Areg afterwards. So, the example above states that the

right hand side after the instruction has been executed.

The description is written with the main function of the instruction stated first (e .g. the

main function of the

add instruction is to put the sum of Areg and Breg into Areg).

This is followed by the other effects of the instruction (e.g. popping the stack). There is

no temporal ordering implied by the order in which the statements are written.

The notation is described more fully in section 1.7.

Example

The

add instruction contains the following description:

Definition:

Areg

′← Breg +

checked Areg

Breg

′← Creg

Creg

′← undefined

This says that the integer stack is popped and Areg assigned the sum of the values

that were initially in Breg and Areg. After the instruction has executed Breg contains

the value that was originally in Creg, and Creg is undefined.

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