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ST20C2 数据表(PDF) 100 Page - STMicroelectronics |
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ST20C2 数据表(HTML) 100 Page - STMicroelectronics |
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100 / 212 page ![]() ldclock ® 100/212 ldclock load clock Code: 64 FD Description: Load into Areg the current value of ClockReg, of the priority selected by Areg, where 0 indicates high priority and 1 indicates low priority. Definition: Areg ′← ClockReg[Areg] Error signals: none Comments: Secondar y instruction. See also: stclock |
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