ST75C540 datasheet(18/84 Pages) STMICROELECTRONICS

18 / 84 page

V - FUNCTIONAL DESCRIPTION (continued)

102

103

VSPK1 (V

RMS)

Distortion

Rx Softclipping and Distortion

(mV

RMS)

D (%)

103

102

MIC2 (mVRMS)

Figure 7 : SPK1 Distortion versus RxA

POWER SPEC1

POWER SPEC2

64Avg

0%Ovlp

Ftop

0.0

dBm

RMS

Vv2

-80.0

Fxd Y O

Line Tx

Speaker Output

Note :

Acoustic echo from speaker to microphone input with no

local speech. Receiving speech on line input.

Figure 8 : Speaker and Line Tx Power Spectrums

V.3.13 - Low Power Mode

Sleep state can be attained by a SLEEPcommand.

When in sleep mode, the dual port RAM is unavail-

able and the clocks are disabled.

Wh en enter ing th e low pow er mod e, th e

ST75C530/540stops its oscillator, all the peripher-

als of the DSP core are stopped in order to reduce

the power consumption. The dual port RAM is

made inaccessible.

The ST75C530/540 can be awakened by a hard-

ware reset, a RING signal or a dummy write at any

location in the dual port RAM.

There is a maximum time of 20ms to restart the

oscillator after waking up and an additional 5ms

after the interrupt to be able to accept any com-

mand coming from the host.

V.3.14 - Reset

After a hardware reset, or an INIT command, the

ST75C530/540 clears all its internal memories,

clears the whole dual port RAM and starts to initial-

ize the delta sigma analog converters. As soon as

t he se i n it ia l izat i on s ar e c om pl ete d, t he

ST75C530/540 generates an interrupt IT6 (com-

mand acknoledge) and is programmed to send and

receive tones, the sample clock are programmed to

9600Hz. The total duration of the reset sequence is

about 5ms. After that time the ST75C530/540 is

readyto executecommands sent by the host micro-

controller. The duration of the reset signal should be

greater than 700ns.

V.4 - Modem Interface

V.4.1 - Analog Interface

Refer to Block Diagram on page 7.

V.4.2 - General I/O and Relay Interface

16 pins are dedicated to the general I/O port. Two

are dedicated to Relaydriver. The equivalent sche-

matic is as follows : see Figure 9.

GIO0[x]

IODIR0[x]

IODATA0[x]

(write)

IODATA0[x]

(read)

RELAY[y]

IORELAY[y]

(write)

IORELAY[y]

(read)

RGND

Figure 9

ST75C530 - ST75C540

18/84

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