ST75C540 datasheet(61/84 Pages) STMICROELECTRONICS

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X.3 - Receive Buffers

Symetrically two identical buffers are provided to

ex c hange

r eceiv e

da t a

b et ween

t h e

ST75C530/540 and the host processor. While the

ST75C530/540 is filling one of the buffers with the

receive bits, the host processor is reading the other

buffer. As soon as the host has emptied a buffer it

frees it by writing 0 in the buffer status byte.

The DUAL Ram area associated with the receive

buffers is as following table.

Name

Address

Description

DTRBS0

$1C

Buffer 0 Status Byte

DTRBS0 [0]

$1D

Buffer 0 Data Byte 0

DTRBS0 [1]

$1E

Buffer 0 Data Byte 1

DTRBS0 [2]

$1F

Buffer 0 Data Byte 2

DTRBS0 [3]

$20

Buffer 0 Data Byte 3

DTRBS0 [4]

$21

Buffer 0 Data Byte 4

DTRBS0 [5]

$22

Buffer 0 Data Byte 5

DTRBS0 [6]

$23

Buffer 0 Data Byte 6

DTRBS0 [7]

$24

Buffer 0 Data Byte 7

DTRBS1

$25

Buffer 1 Status Byte

DTRBS1 [0]

$26

Buffer 1 Data Byte 0

DTRBS1 [1]

$27

Buffer 1 Data Byte 1

DTRBS1 [2]

$28

Buffer 1 Data Byte 2

DTRBS1 [3]

$29

Buffer 1 Data Byte 3

DTRBS1 [4]

$2A

Buffer 1 Data Byte 4

DTRBS1 [5]

$2B

Buffer 1 Data Byte 5

DTRBS1 [6]

$2C

Buffer 1 Data Byte 6

DTRBS1 [7]

$2D

Buffer 1 Data Byte 7

The Bit 0 (LSB) of the Buffer 0 Data Byte 0 is the

first received bit in time (the oldest).

According to the Data Format, the Status byte of a

buffer has different meaning. However a value of 0

signals to the ST75C530/540that a buffer is empty.

This value is set by the Host each time it has

emptied the buffer. After having used one buffer,

the host must select the other buffer for the next

operation. The Host must start with the Buffer 0 as

soon as the STA_109 signal goes.

A mechanism of interruption (IT3 for Receive) is

associated with the Data Buffer managment. Each

time a buffer is filled by the ST75C530/540 it gen-

erates an interrupt.

X.4 - Interruption

Two Interrupt signals are provided in order to syn-

chronize the Data Buffer Exchanges.

IT2 is asso-

ciated with the Transmit Buffer mechanism and IT3

with the Receive Buffer mechanism.

In order to enable these interrupts, the Host proc-

essor must set the bit 2 (for

IT2) and the bit 3 (for

IT3) of the ITMASK Register to 1. It must also set

the Bit 7 of the

ITMASK register to 1 in order to

globally enable all the selected sources of interrup-

tion.

When an Interrupt occurs (low level on SINTR pin)

the user must read the

ITSRCR Register to deter-

mine the source of the interrupt, either IT2 for Tx (if

the bit 2 is 1) or

IT3 for Rx (if the bit 3 is 1).

Once the Interrupt has been serviced, the host

must acknowledge it by writing a $00 value into the

ITRES3 for IT3.

These registers have the following address :

Name

Address

Type

Description

ITRES2

$42

Write only

Clear IT2

ITRES3

$43

Write only

Clear IT3

ITMASK

$4F

Read/Write

Interrupt Mask

ITSRCR

$50

Read Only

Interrupt Source

Notes : 1. The ST75C530/540 does not check that the interrupt has

been acknowledged.

2. Even if the Host does not use the interruption, the

ST75C530/540 will set the bit 2 (for IT2) and/or bit 3 (for

T3) of the ITSRCR.

3. The ST75C530/540 uses only the Data Buffer Status

Bytes to detect Overrun or Underrun Error. These errors

are reported into the SYSERR byte, and could generate

an interrupt I

T0.

The equivalent schematic is : see Figure 21.

The interrupt mechanism assumes that the Host

processor uses a Level sensitive interrupt (active

low). The Flow chart of the Host interrupt service

routine looks generaly like Figure 22.

X.5 - Data Format

Different Formats of Data can be Transmitted/Re-

ceived to/from the Telephone Line.

These Formats can be selected when entering the

Data Mode by using the

FORM command.

The Format of the Data can be changed,on the fly

in the Data Mode during the same communication,

by sendinga differentFORM commandat any time.

Note that for Full Duplex operation the Data For-

mat is the same for the transmitter and the re-

ceiver.

X - PARALLEL DATA EXCHANGE (continued)

ST75C530 - ST75C540

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