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ADE7566 数据表(PDF) 34 Page - Analog Devices

部件名 ADE7566
功能描述  Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
PDF  136 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADE7566 数据表(HTML) 34 Page - Analog Devices

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ADE7566/ADE7569
Preliminary Technical Data
Rev. PrA | Page 34 of 136
ENERGY MEASUREMENT
The ADE7566/ADE7569 offer a fixed function, energy
measurement, digital processing core that provides all the
information needed to measure energy in single-phase energy
meters. The part provides two ways to access the energy
measurements: direct access through SFRs for time sensitive
information and indirect access through address and data SFR
registers for the majority of energy measurements. The Irms,
Vrms, interrupts, and waveform registers are readily available
through SFRs as shown in Table 27. Other energy measurement
information is mapped to a page of memory that is accessed
indirectly through the MADDPT, MDATL, MDATM, and
MDATH SFRs. The address and data registers act as pointers to
the energy measurement internal registers.
ACCESS TO ENERGY MEASUREMENT SFRs
Access to the energy measurement SFRs is achieved by reading
or writing to the SFR addresses detailed in Table 28. The
internal data for the MIRQx SFRs are latched byte by byte into
the SFR when the SFR is read.
The WAV1x, WAV2x, VRMSx, and IRMSx registers are all 3-byte
SFRs. The 24-bit data is latched into these SFRs when the high
byte is read. Reading the low or medium byte before the high
byte results in reading the data from the previous latched sample.
Sample 8051 code to read the Vrms register is shown below.
MOV
R1, VRMSH
//latches data in VrmsH,
VrmsM and VrmsL SFR
MOV
R2, VRMSM
MOV
R3, VRMSL
ACCESS TO INTERNAL ENERGY MEASUREMENT
REGISTERS
Access to the internal energy measurement registers is achieved
by writing to the Energy Measurement Pointer Address SFR
(MADDPT, 0x91). This SRF selects the energy measurement
register to be accessed and determines if a read or a write is
performed (see Table 27).
Table 27. Energy Measurement Pointer Address SFR
(MADDPT, 0x91)
Bit Number
Description
7
1 = write, 0 = read
6 to 1
Energy measurement internal register address
Writing to the Internal Energy Measurement Registers
When Bit 7 of the Energy Measurement Pointer Address SFR
(MADDPT, 0x91) is set, the content of the MDATx SFRs
(MDATL, MDATM, and MDATH) is transferred to the internal
energy measurement register designated by the address in the
MADDPT SFR. If the internal register is 1 byte long, only the
MDATL SFR content is copied to the internal register, while the
MDATM SFR and MDATH SFR contents are ignored.
The energy measurement core functions with an internal clock
of 4.096 MHz ∕ 5 or 819.2 kHz. Because the 8052 core functions
with another clock, 4.096MHz ∕ 2CD, synchronization between
the two clock environments when CD = 0 or 1 is an issue. When
data is written to the internal energy measurement, a small wait
period needs to be implemented before another read or write to
these registers can take place.
Sample 8051 code to write 0x0155 to the 2-byte SAGLVL
register located at 0x14 in the energy measurement memory
space is shown below.
MOV
MDATM,#01h
MOV
MDATL,#55h
MOV
MADDPT,#SAGLVL_W (address 0x94)
MOV
A, #05h
DJNZ
ACC, $
;Next Write or read to Energy Measurement
SFR can be done after this.
Reading the Internal Energy Measurement Registers
When Bit 7 of Energy Measurement Pointer Address SFR
(MADDPT, 0x91) is cleared, the content of the internal energy
measurement register designated by the address in MADDPT
is transferred to the MDATx SFRs. If the internal register is
1 byte long, only the MDATL SFR content is updated with a
new value, while the MDATM SFR and MDATH SFR contents
are reset to 0x00.
The energy measurement core functions with an internal clock
of 4.096 MHz ∕ 5 or 819.2 kHz. Because the 8052 core functions
with another clock, 4.096MHz ∕ 2CD, synchronization between
the two clock environments when CD = 0 or 1 is an issue. When
data is read from the internal energy measurement, a small wait
period needs to be implemented before the MDATx SFRs are
transferred to another SFR.
Sample 8051 code to read the peak voltage in the 2-byte VPKLVL
register located at 0x16 into the data pointer is shown below.
MOV
MADDPT,#VPKLVL_R (address 0x16)
MOV
A, #05h
DJNZ
ACC, $
MOV
DPH, MDATM
MOV
DPL, MDATL



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