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ADE7566 数据表(PDF) 27 Page - Analog Devices |
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ADE7566 数据表(HTML) 27 Page - Analog Devices |
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27 / 136 page  Preliminary Technical Data ADE7566/ADE7569 Rev. PrA | Page 27 of 136 POWER SUPPLY MONITOR INTERRUPT (PSM) The power supply monitor interrupt (PSM) alerts the 8052 core of power supply events. The PSM interrupt is disabled by default. Setting the EPSM bit in the Interrupt Enable and Priority 2 SFR (IEIP2, 0xA9) enables the PSM interrupt. The Power Management Interrupt Enable SFR (IPSME, 0xEC) controls the events that result in a PSM interrupt. Figure 23 is a diagram illustrating how the PSM interrupt vector is shared among the PSM interrupt sources. The PSM interrupt flags are latched and must be cleared by writing to the flag register. EPSR FPSR ESAG FSAG EVSW FVSW EBAT FBAT EBSO FBSO EVDCIN FVDCIN FPSM EPSM TRUE? PENDING PSM INTERRUPT EPSR RESERVED ESAG RESERVED EVSW EBAT EBSO EVDCIN FPSR FPSM FSAG RESERVED FVSW FBAT FBSO FVDCIN RESERVED PTI RESERVED PSI EADE ETI EPSM ESI IPSME ADDR. 0xEC IPSMF ADDR. 0xF8 IEIP2 ADDR. 0xA9 NOT INVOLVED IN PSM INTERRUPT SIGNAL CHAIN Figure 23. PSM Interrupt Sources |
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