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ADE7566 数据表(PDF) 32 Page - Analog Devices |
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ADE7566 数据表(HTML) 32 Page - Analog Devices |
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32 / 136 page  ADE7566/ADE7569 Preliminary Technical Data Rev. PrA | Page 32 of 136 3.3 V PERIPHERALS AND WAKE-UP EVENTS Some of the 3.3 V peripherals are capable of waking the ADE7566/ADE7569 from PSM2. The events that can cause the ADE7566/ADE7569 to wake up from PSM2 are listed in the wake-up events column in Table 26. Table 26. 3.3 V Peripherals and Wake-up Events 3.3 V Peripheral Wake-Up Event Wake-Up Enable Bits Flag Interrupt Vector Comments Temperature ADC ∆T Maskable – ITADC The temperature ADC can wake-up the 8052 if the ITADC flag is set. This flag is set according to the description in the Temperature Measurement section. This wake-up event can be disabled by disabling temperature measurements in the Temperature and Supply Delta SFR (DIFFPROG, 0xF3) in PSM2. VSW ADC ΔV Maskable VSWF IPSM The VSW measurement can wake up the 8052. The VSWF is set according to the description in the External Voltage Measurement section. This wake-up event can be disabled by clearing the EVSW in the Power Management Interrupt Enable SFR (IPSME, 0xEC). Power Supply Management PSR Nonmaskable PSR IPSM The 8052 wakes up if the power supply is restored (if VSW switches to be connected to VDD). The VSWSOURCE flag, Bit 6 of the Peripheral Configuration SFR (PERIPH, 0xF4) SFR, is set to indicate that VSW is connected to VDD.. Midnight Nonmaskable Midnight IRTC The ADE7566/ADE7569 wakes up at midnight every day to update its calendar. RTC Alarm Maskable Alarm IRTC Set an alarm to wake the ADE7566/ADE7569 after the desired amount of time. The RTC alarm is enabled by setting the ALARM bit in the RTC Configuration SFR (TIMECON, 0xA1). All I/O pins are treated as inputs. The weak pull-up on each I/O pin can be disabled individually in the Port 0 Weak Pull-Up Enable SFR (PINMAP0, 0xB2), Port 1 Weak Pull-Up Enable SFR (PINMAP1, 0xB3), and Port 2 Weak Pull-Up Enable SFR (PINMAP2, 0xB4) to decrease current consumption. The interrupts can be enabled/disabled. INT0 INT0PRG = 1 – IE0 The edge of the interrupt is selected by Bit IT0 in the TCON register. The IE0 flag bit in the TCON register is not affected. INT1 INT1PRG[2:0] = 11x – IE1 The edge of the interrupt is selected by Bit IT1 in the TCON register. The IE1 flag bit in the TCON register is not affected. I/O Ports Rx Edge RXPROG[1:0] = 11 PERIPH.7 (RXFG) – An Rx edge event occurs if a rising or falling edge is detected on the Rx line. External Reset RESET Nonmaskable – – If the RESET pin is brought low while the ADE7566/ADE7569 is in PSM2, it wakes up to PSM1. LCD – – – – The LCD can be enabled/disabled in PSM2. The LCD data memory remains intact. Scratch Pad – – – – The 4 SCRATCHx registers remain intact in PSM2. |
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