T80C5112-RKFCL datasheet(38/97 Pages) ATMEL

38 / 97 page

Rev. B - November 10, 2000

Preliminary

T80C5112

Table 19. PCON Register

PCON - Power Control Register (87h)

Reset Value = 0001 0000b

Not bit addressable

Power-off flag reset value will be 1 only after a power on (cold reset). A warm reset doesnÕt affect the value of this bit.

SMOD1

SMOD0

RSTD

POF

GF1

GF0

IDL

Bit Number

Bit

Mnemonic

Description

SMOD1

Serial port Mode bit 1 for UART

Set to select double baud rate in mode 1, 2 or 3.

SMOD0

Serial port Mode bit 0 for UART

Clear to select SM0 bit in SCON register.

Set to to select FE bit in SCON register.

RSTD

Reset Detector Disable Bit

Clear to disable PFD.

Set to enable PFD.

POF

Power-Off Flag

Clear to recognize next reset type.

Set by hardware when VCC rises from 0 to its nominal voltage. Can also be set by software.

GF1

General purpose Flag

Cleared by user for general purpose usage.

Set by user for general purpose usage.

GF0

General purpose Flag

Cleared by user for general purpose usage.

Set by user for general purpose usage.

Power-Down mode bit

Cleared by hardware when reset occurs.

Set to enter power-down mode.

IDL

Idle mode bit

Clear by hardware when interrupt or reset occurs.

Set to enter idle mode.

T80C5112-RKFCL 数据表(PDF) 38 Page - ATMEL Corporation

T80C5112-RKFCL 数据表(HTML) 38 Page - ATMEL Corporation

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