STLC5048

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FUNCTIONAL DESCRIPTION (continued)

RINGING STATE

This state can be used during the ringing phase in order to transmit a low frequency ringing signal (25-50 Hz).

In order to obtain a 1 Vrms ringing signal at VFRO output a digital signal DR equal to -0.78dBm0 must be pro-

vided.

This state means B, Z, X, KD and KA blocks equal to open circuits and the R block configured in order to obtain

the maximum gain at the frequency of 25-50 Hz. During the ringing state if the TX time slot is enabled the idle

PCM code is forced to DX.

To switch to this state, a bit (FR0..3) in the COEFST register must be set for every channel.

The programmed values for the previous blocks become active only when the FR and FD bits are reset.

If both FR and FD bits of a channel are set, the selected coefficient will be those of the Ringing State.

IMPEDANCE SYNTHESYS

The impedance synthesis is performed by fully digital filters (Z and KD) and by an analog path (KA).

The Z, KD and KA filters report to the receive path the feedback signal coming from the transmit path. The co-

efficients of the Z, KD and KA filters are programmed via the ZFC, KD and AFE_CFF commands respectively.

ECHO CANCELING

The trans-hybrid balance is performed by the digital programmable filter B.

The B filter reports to the transmit path the signal coming from the receive path. The coefficient of the B filter

are programmed via the BFC command.

Figure 2. Transmit path.

TRANSMIT PATH

The transmit section input consist of the input amplifier, the A/D converter, the equalization filter X, the gain

block GX, the encoder and the channel filters (LPX and HPX).

The input amplifier is provided of a programmable gain with a typical input impedance of 1M

Ω. The amplifier

gain can be programmed with two different values (0dB, +3.52dB) by means of the TXG Register.

VFXI input must be AC coupled to the signal; the voltage swing allowed is 1.4Vpp when the preamplifier gain is

set to 0dB and 0.93Vpp when the gain is 3.52dB; higher levels must be reduced through proper dividers.

Following the input amplifier the signal is converted into digital domain and a X filter block is programmed to

equalise together with the HPX and LPX filters the frequency response. The coefficients of the X filter are pro-

grammed via the XFC command.

A gain block (GX) allows to set the transmit level in a 30dB range, with steps <0.01dB. This block can be pro-

grammed via the GTX command.

DX

TXG

VFXI

1M

Ω

AGND

Σ∆

CONV.

GXO

A/

µ

GX

for TXG=0dB; GX=0dB (FF)

61mVms => 0dBm0

D00TL469