STLC5048 datasheet(33/45 Pages) STMICROELECTRONICS

33 / 45 page

33/45

STLC5048

ELECTRICAL CHARACTERISTCS

Typical value are for 25°C and nominal supply voltage. Minimum and maximum values are guaranteed over the

temperature 0-70°C range by production testing and supply voltage range shown in the Operating Ranges. Per-

formances over -40 +85°C range are guaranteed by product characterisation unless otherwise specified.

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

DIGITAL INTERFACE

Vil

Input Voltage Low DI pins

0.2Vdd

Vih

Input Voltage High DI pins

0.8Vdd

5.5

Iil

Input Current Low DI pins

-10

µA

Iih

Input Current High DI pins

-10

µA

Input Capacitance (all dig. inp.)

Vol

Output Voltage Low DX, TSX pins Iol=3.2mA (other pins Iol=1mA)

0.4

Voh

Output Voltage High DX pin

Ioh=-3.2mA (other pins Iol=1mA)

0.85Vdd

Vdd

Note: all digital input are 5V tolerant.

ANALOG INTERFACE

RIX

Transmit Input Amplifier Input

Impedance (VFXI)

Ω

ROR

Receive Output Impedance

Ω

POWER DISSIPATION

Idd(pd)

Power down Current

Idd(act)

Active Current

PCM INTERFACE TIMING

f(MCLK)

Master Clock Frequency

1.536

1.544

2.048

4.096

8.192

MHz

Twmh

Period of MCLK high

Twml

Period of MCLK low

Trm

MCLK rise time

Tfm

MCLK fall time

Thbf

Hold Time MCLK Low to FSX/R

High or Low

Tsfb

Setup time FSX/R High to MCLK Low

Tdmd

Delay Time, MCLK High to Data Valid

Tdmz

Delay Time from MCLK(8) Low to

Data Output disabled

Tdfd

Delay Time, FSX High to Data

Valid if FSX rises later than MCLK

rising edge

Tdmt

Delay Time, from MCLK and FSX

both high to TSX Low

Tzmt

Delay time from MCLK(8) low to

TSX disabled

Tsdm

Setup time, DR Valid to MCLK Low

5ns

Thdm

Hold time, MCLK Low to DR

invalid

5ns

STLC5048 数据表(PDF) 33 Page - STMicroelectronics

STLC5048 数据表(HTML) 33 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

数据表下载